Patents by Inventor Robert L. Vyne

Robert L. Vyne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4492929
    Abstract: An integrated operational amplifier circuit includes an input stage comprising first and second junction field effect transistors coupled to a current mirror circuit and an output stage including first and second NPN transistor means for respectively supplying current to and receiving current from a load. In order to compensate for voltage translated back to the output of the input stage, a portion of the current received by the second transistor means is fed back to a metallic power supply conductor. The input field effect transistors are also coupled to a current mirror means including degeneration resistors which are likewise coupled to the power supply conductor means. In this manner, a small portion of the current fed back to the power supply conductor means creates a voltage differential between the first and second degeneration resistors thus compensating for the voltage fed back to the output of the input stage.
    Type: Grant
    Filed: May 13, 1983
    Date of Patent: January 8, 1985
    Assignee: Motorola, Inc.
    Inventor: Robert L. Vyne
  • Patent number: 4306246
    Abstract: A method for achieving active devices with closely matched characteristics for use in high performance monolithic integrated circuits. The method comprises providing active devices with appropriately segmented junction regions connected in parallel by their metallic links and severing one or more of the links in order to achieve matching of both the static and dynamic characteristics of two or more active devices.
    Type: Grant
    Filed: June 26, 1980
    Date of Patent: December 15, 1981
    Assignee: Motorola, Inc.
    Inventors: Robert B. Davies, Robert L. Vyne
  • Patent number: 4268848
    Abstract: A system including in combination matched semiconductor elements in a monolithic integrated circuit together with an inexpensive encapsulation. Good electrical matching of individual components in an integrated circuit is achieved by predetermined placement and orientation of the matched components on the semiconductor element. The match is maintained through the assembly steps comprising mounting of the semiconductor element on a metallic support and subsequent encapsulation of the assembly. Best matching for devices located substantially in a {111} plane is achieved by symmetrical placement about a <211> direction.
    Type: Grant
    Filed: May 7, 1979
    Date of Patent: May 19, 1981
    Assignee: Motorola, Inc.
    Inventors: John F. Casey, Robert L. Vyne