Patents by Inventor Robert Lander
Robert Lander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230375167Abstract: The disclosure provides a lighting device that provides light via one or more non-incandescent lamps that can be moved and arranged while operating. The lighting device includes a non-opaque shroud, or casing, that sits upon a base to create a volume within which the non-incandescent lamps rest and can be moved while still providing light. The non-incandescent lamp can use one or more light-emitting diodes (LEDs). The non-incandescent lamps can provide illumination with minimal heat and low power consumption that contributes to user interaction and can be battery powered. In addition to a non-incandescent lamp, a lighting device having at least one of the non-incandescent lamps is disclosed. Additionally, a lighting system having at least one of the lighting devices and a lighting control application is provided herein.Type: ApplicationFiled: August 1, 2023Publication date: November 23, 2023Inventors: Brewster Waddell, Robert Landers
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Patent number: 11713869Abstract: The disclosure provides a lighting device that provides light via one or more non-incandescent lamps that can be moved and arranged while operating. The lighting device includes a non-opaque shroud, or casing, that sits upon a base to create a volume within which the non-incandescent lamps rest and can be moved while still providing light. The non-incandescent lamp can use one or more light-emitting diodes (LEDs). The non-incandescent lamps can provide illumination with minimal heat and low power consumption that contributes to user interaction and can be battery powered. In addition to a non-incandescent lamp, a lighting device having at least one of the non-incandescent lamps is disclosed. Additionally, a lighting system having at least one of the lighting devices and a lighting control application is provided herein.Type: GrantFiled: November 30, 2021Date of Patent: August 1, 2023Assignee: Latin-Negocio, LLCInventors: Brewster Waddell, Robert Landers
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Publication number: 20220170618Abstract: The disclosure provides a lighting device that provides light via one or more non- incandescent lamps that can be moved and arranged while operating. The lighting device includes a non-opaque shroud, or casing, that sits upon a base to create a volume within which the non-incandescent lamps rest and can be moved while still providing light. The non- incandescent lamp can use one or more light-emitting diodes (LEDs). The non-incandescent lamps can provide illumination with minimal heat and low power consumption that contributes to user interaction and can be battery powered. In addition to a non-incandescent lamp, a lighting device having at least one of the non-incandescent lamps is disclosed. Additionally, a lighting system having at least one of the lighting devices and a lighting control application is provided herein.Type: ApplicationFiled: November 30, 2021Publication date: June 2, 2022Inventors: Brewster Waddell, Robert Landers
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Patent number: 9375073Abstract: A tablet support accessory is revealed that holds electronic tablets, iPads, notebooks, game players, e-readers, smart-phones, or other interactive electronic devices or viewing devices, on the thigh of a sitting, supine, or semi-supine person. Because interactivity at times involves the tapping on the face of the device, the tablet support accessory is stabilized by coupling a thigh brace and platform assembly, on which the device is held, to a support in the wearer's knee-shin region by means of an adjustable strap.Type: GrantFiled: May 26, 2014Date of Patent: June 28, 2016Inventors: John Traylor Orr, Jr., Jack Robert Lander
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Patent number: 8994112Abstract: A Fin FET whose fin (12) has an upper portion (30) doped with a first conductivity type and a lower portion (32) doped with a second conductivity type, wherein the junction (34) between the upper portion (30) and the lower portion (32) acts as a diode; and the FinFET further comprises: at least one layer (26, 28) of high-k dielectric material (for example Si3N4) adjacent at least one side of the fin (12) for redistributing a potential drop more evenly over the diode, compared to if the at least one layer of high-k dielectric material were not present, when the upper portion (30) is connected to a first potential and the lower portion (32) is connected to a second potential thereby providing the potential drop across the junction (34). Examples of the k value for the high-k dielectric material are k?5, k?7.5, and k?20.Type: GrantFiled: September 10, 2009Date of Patent: March 31, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Gerben Doornbos, Robert Lander
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Patent number: 8722015Abstract: The invention provides methods and compositions for identifying and quantifying pathological changes on the retina.Type: GrantFiled: April 1, 2011Date of Patent: May 13, 2014Assignee: The Schepens Eye Research Institute, Inc.Inventors: Andrius Kazlauskas, Magdalena Staniszewska, Carmelo Romano, Robert Landers, David P. Bingaman
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Publication number: 20110305641Abstract: The invention provides methods and compositions for identifying and quantifying pathological changes on the retina.Type: ApplicationFiled: April 1, 2011Publication date: December 15, 2011Inventors: Andrius Kazlauskas, Magdalena Staniszewska, Carmelo Romano, Robert Landers, David P. Bingaman
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Publication number: 20110169101Abstract: A Fin FET whose fin (12) has an upper portion (30) doped with a first conductivity type and a lower portion (32) doped with a second conductivity type, wherein the junction (34) between the upper portion (30) and the lower portion (32) acts as a diode; and the FinFET further comprises: at least one layer (26, 28) of high-k dielectric material (for example Si3N4) adjacent at least one side of the fin (12) for redistributing a potential drop more evenly over the diode, compared to if the at least one layer of high-k dielectric material were not present, when the upper portion (30) is connected to a first potential and the lower portion (32) is connected to a second potential thereby providing the potential drop across the junction (34). Examples of the k value for the high-k dielectric material are k?5, k?7.5, and k?20.Type: ApplicationFiled: September 10, 2009Publication date: July 14, 2011Inventors: Gerben Doornbos, Robert Lander
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Patent number: 7763944Abstract: The invention relates to a CMOS device (10) with an NMOST I and PMOST 2 having gate regions (1D,2D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.Type: GrantFiled: August 10, 2005Date of Patent: July 27, 2010Assignee: NXP B.V.Inventors: Jacob C. Hooker, Robert Lander, Robertus Wolters
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Publication number: 20090302389Abstract: A method is described for forming gate structures with different metals on a single substrate. A thin semiconductor layer (26) is formed over gate dielectric (24) and patterned to be present in a first region (16) not a second region (18). Then, metal (30) is deposited and patterned to be present in the second region not the first. Then, a fully suicided gate process is carried out to result in a fully suicided gate structure in the first region and a gate structure in the second region including the fully suicided gate structure above the deposited metal (30).Type: ApplicationFiled: September 11, 2006Publication date: December 10, 2009Applicant: NXP B.V.Inventors: Robert Lander, Mark Van Dal, Jacob Hooker
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Publication number: 20080211032Abstract: The invention relates to a CMOS device (10) with an NMOST I and PMOST 2 having gate regions (1D,2D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.Type: ApplicationFiled: August 10, 2005Publication date: September 4, 2008Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Jacob C. Hooker, Robert Lander, Robertus Wolters
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Patent number: 7326631Abstract: Consistent with an example embodiment, a method of manufacturing a semiconductor device comprises MOS transistors having gate electrodes formed in a number of metal layers deposited upon one another. Active silicon regions having a layer of a gate dielectric and field-isolation regions insulating these regions from each other are formed in a silicon body. Then, a layer of a first metal is deposited in which locally, in a part of the active regions, nitrogen is introduced. On the layer of the first metal, a layer of a second metal is then deposited, after which the gate electrodes are etched in the metal layers. Before nitrogen is introduced into the first metal layer, an auxiliary layer of a third metal permeable to nitrogen is deposited an the first metal layer. Thus, the first metal layer can be nitrided locally without the risk of damaging the underlying gate dielectric.Type: GrantFiled: January 15, 2004Date of Patent: February 5, 2008Assignee: NXP B.V.Inventors: Robert Lander, Jacob Christopher Hooker, Robertus Adrianus Maria Wolters
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Patent number: 7320939Abstract: A semiconductor device, fabricated by a method, having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate is disclosed. In one embodiment, the method includes i) forming, at least at the silicon region, a metal cluster layer from a first metal, such that, in the metal cluster layer, metal clusters alternate with sites where there are no metal clusters, the first metal being a non-siliciding metal at predetermined conditions, ii) depositing a metal layer of a second metal on top of the metal cluster layer, the second metal being a siliciding metal and iii) carrying out at least one heat treatment at the predetermined conditions on the second metal layer so as to form metal silicide through reaction of the second metal with the silicon region, wherein atoms of the first metal are displaced in a direction substantially perpendicular to the surface of the substrate.Type: GrantFiled: September 22, 2006Date of Patent: January 22, 2008Assignees: Interuniversitair Microelektronica Centrum (IMEC), Koninklijke Philips Electronics N.V.Inventors: Robert Lander, Marcus Johannes Henricus van Dal, Jacob Christopher Hooker
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Patent number: 7189648Abstract: One embodiment of the invention relates to a method for fabricating a semiconductor device having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate. The method comprises forming a metal cluster layer from a first, non-siliciding metal, followed by the deposition of a metal layer consisting of a second, siliciding metal. A subsequent heat treatment is responsible for forming a metal silicide from the second metal, the atoms of the first metal being displaced in a direction substantially perpendicular to the surface of the substrate. According to one embodiment of the invention, the atoms of the first metal are displaced by the Kirkendall effect to beneath the metal silicide. If an MOST, for example, is being fabricated, this has advantages both at the location of the source and drain region and at the location of the gate electrode.Type: GrantFiled: October 15, 2004Date of Patent: March 13, 2007Assignees: Interuniversitair Microelektronica Centrum (IMEC), Koninklijke Philips Electronics N.V.Inventors: Robert Lander, Marcus Johannes Henricus van Dal, Jacob Christopher Hooker
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Publication number: 20070020930Abstract: A semiconductor device, fabricated by a method, having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate is disclosed. In one embodiment, the method includes i) forming, at least at the silicon region, a metal cluster layer from a first metal, such that, in the metal cluster layer, metal clusters alternate with sites where there are no metal clusters, the first metal being a non-siliciding metal at predetermined conditions, ii) depositing a metal layer of a second metal on top of the metal cluster layer, the second metal being a siliciding metal and iii) carrying out at least one heat treatment at the predetermined conditions on the second metal layer so as to form metal silicide through reaction of the second metal with the silicon region, wherein atoms of the first metal are displaced in a direction substantially perpendicular to the surface of the substrate.Type: ApplicationFiled: September 22, 2006Publication date: January 25, 2007Inventors: Robert Lander, Marcus van Dal, Jacob Hooker
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Publication number: 20060138475Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (1) and a semiconductor body (2) comprising a first (N-MOS)PET (3) with a first channel region (3A) and a first gate electrode (3B) which includes a first conductor and which is separated from the channel region by a dielectric layer (4), and comprising a second (P-MOS)FET (5) with a second channel region (5A) and a second gate electrode (5B) which includes a second conductor that is different from the first conductor and which is separated from the channel region (5A) by a dielectric layer (4), wherein to form the gate electrodes (3B, 5B) a first conductor layer (33) is deposited on the semiconductor body (2) provided with the dielectric layer (4), which layer (33) is subsequently removed outside the first channel region (3A) after which a second conductor layer (55) is deposited on the semiconductor body (2), and wherein before the first conductor layer (33) is deposited, an intermediate layer (6) is deposited onType: ApplicationFiled: January 16, 2004Publication date: June 29, 2006Inventors: Robert Lander, Dirk Knotter
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Publication number: 20060134848Abstract: Method of manufacturing a semiconductor device comprising MOS transistors having gate electrodes (15, 16) formed in a number of metal layers (8, 9, 13; 8, 12, 13) deposited upon one another. In this method, active silicon regions (4, 5) provided with a layer of a gate dielectric (7) and field-isolation regions (6) insulating these regions with respect to each other are formed in a silicon body (1). Then, a layer off a first metal (8) is deposited in which locally, at the location of a part of the active regions (4), nitrogen is introduced. On the layer of the first metal, a layer of a second metal (13) is then deposited, after which the gate electrodes are etched in the metal layers. Before nitrogen is introduced into the first metal layer, an auxiliary layer of a third metal (9) which is permeable to nitrogen is deposited on the first metal layer. Thus, the first metal layer can be nitrided locally without the risk of damaging the underlying gate dielectric.Type: ApplicationFiled: January 15, 2004Publication date: June 22, 2006Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Robert Lander, Jacob Hooker, Robertus Wolters
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Publication number: 20050239760Abstract: Compositions of angiostatic agents for treating choroidal neovascularization resulting from ocular surgery or from trauma to ocular tissue and methods for their use are disclosed.Type: ApplicationFiled: April 15, 2005Publication date: October 27, 2005Inventors: David Bingaman, Changdong Liu, Robert Landers, Xiaolin Gu
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Publication number: 20050137146Abstract: Agents that stimulate nuclear translocation of Nrf2 protein and the subsequent increases in gene products that detoxify and eliminate cytotoxic metabolites are provided in a method for treating glaucomatous retinopathy or optic neuropathy. The structurally diverse agents that act on the Nrf2/ARE pathway induce the expression of enzymes and proteins that possess chemically versatile cytoprotective properties and are a defense against toxic metabolites and xenobiotics. Agents include certain electrophiles and oxidants such as a Michael Addition acceptor, diphenol, thiocarbamate, quinone, 1,2-dithiole-3-thione, butylated hydroxyanisole, flavonoid, an isothiocyanate, 3,5-di-tert-butyl-4-hydroxytoluene, ethoxyquin, a coumarin, combinations thereof, or a pharmacologically active derivative or analog thereof.Type: ApplicationFiled: December 17, 2004Publication date: June 23, 2005Applicant: Alcon, Inc.Inventors: Robert Landers, Iok-Hou Pang
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Publication number: 20050137147Abstract: Agents that stimulate nuclear translocation of Nrf2 protein and the subsequent increases in gene products that detoxify and eliminate cytotoxic metabolites are provided in a method for treating diabetic retinopathy or drusen formation in age-related macular degeneration. The structurally diverse agents that act on the Nrf2/ARE pathway induce the expression of enzymes and proteins that possess chemically versatile cytoprotective properties and are a defense against toxic metabolites and xenobiotics. Agents include certain electrophiles and oxidants such as a Michael Addition acceptor, diphenol, thiocarbamate, quinone, 1,2-dithiole-3-thione, butylated hydroxyanisole, flavonoid other than genistein, an isothiocyanate, 3,5-di-tert-butyl-4-hydroxytoluene, ethoxyquin, a coumarin, combinations thereof, or a pharmacologically active derivative or analog thereof.Type: ApplicationFiled: December 17, 2004Publication date: June 23, 2005Applicant: Alcon, Inc.Inventors: Robert Landers, David Bingaman