Abstract: Provided herein are methods, uses, and compositions for treating AF in a patient, such as a patient exhibiting heart failure with reduced ejection fraction.

Abstract: A heat shield and gasket assembly has three members including a first heat shield, a second heat shield, and a gasket. Each of the members has a flange portion and the flange portion of the gasket is sandwiched is between the flanges of the two heat shields. The flange portion of the gasket is thinner than the flange portions of the heat shields. The thinness of the gasket flange permits it to engage threaded assembly fasteners without compromising the thread integrity of the fasteners.

Abstract: A heat shield and gasket assembly has three members including a first heat shield, a second heat shield, and a gasket. Each of the members has a flange portion and the flange portion of the gasket is sandwiched between the flanges of the two heat shields. The flange portion of the gasket is thinner than the flange portions of the heat shields. The thinness of the gasket flange permits it to engage threaded assembly fasteners without compromising the thread integrity of the fasteners.

Abstract: A heat shield and gasket assembly has three members including a first heat shield, a second heat shield, and a gasket. Each of the members has a flange portion and the flange portion of the gasket is sandwiched between the flanges of the two heat shields. The flange portion of the gasket is thinner than the flange portions of the heat shields. The thinness of the gasket flange permits it to engage threaded assembly fasteners without compromising the thread integrity of the fasteners.

Abstract: A data structure for processing a neural network, and a method of processing a neural network are disclosed. The data structure, which is in a memory device, includes a first data structure portion and a second data structure portion within the memory device. The first data structure portion includes a first plurality of sequential memory locations. Each of the first plurality of sequential memory locations stores a respective input data signal value to be provided to respective inputs of both a first neuron and a second neuron of a first layer of the neural network. The second data structure portion includes a second plurality of sequential memory locations. Each of the second plurality of sequential memory locations stores a respective weight value corresponding to a respective input of a respective one of the first neuron and the second neuron.

Abstract: A data queue control submodule supporting a host processor and at least one peripheral device. The submodule includes a memory unit with a first memory portion for storing queue commands associated with each peripheral device and a second memory portion for storing peripheral device data. A queue control unit is also included in the submodule for controlling the flow of data between the peripheral devices and the host processor in accordance with the queue control commands. A port interface connects the queue control unit and the peripheral devices in response to a trigger event. The submodule further includes an event controller in communication with the host processor and the port interface for generating event triggers in response to data demands of either the host processor or the other peripheral devices. The present invention is advantageous in that it simplifies the design of each port interface and provides improved flexibility in the queue structure of the overall control system.

Abstract: An electronic circuit having control data registers (24-28) for receiving the output of a digital counter (20) that records clock pulses within a measured time that is determined by a rotary speed sensor (14) which produces a square wave pulse train signal and separate registers (30,32) for recording the time of each signal developed by the speed sensor and the time to produce a pulse train signal of predetermined length whereby the data in the data registers may be used to determine velocity and derivatives of that velocity for use in solving dynamic equations stored in memory thus effecting control system output functions.