Patents by Inventor Robert Lee Ayers, Sr.

Robert Lee Ayers, Sr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Boundary scan apparatus and interconnect test method
    Patent number: 7428677
    Abstract: An electronic device, such as chip, card, system and in situ boundary scan test facilities are disclosed. The boundary scan test facility includes a boundary scan cell (Level Sensitive Scan Design, LSSD structure and selector) connected between output pads of the electronic device. By so doing the test path for boundary scan testing is segregated from the operational signal path which is used when the device is performing its normal function.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: September 23, 2008
    Assignee: International Business Machines Corporation
    Inventor: Robert Lee Ayers, Sr.
  • Boundary scan apparatus and interconnect test method
    Patent number: 7032146
    Abstract: An electronic device, such as chip, card, system and in situ boundary scan test facilities are disclosed. The boundary scan test facility includes a boundary scan cell (Level Sensitive Scan Design, LSSD structure and selector) connected between output pads of the electronic device. By so doing the test path for boundary scan testing is segregated from the operational signal path which is used when the device is performing its normal function.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: April 18, 2006
    Assignee: International Business Machines Corporation
    Inventor: Robert Lee Ayers, Sr.