Patents by Inventor Robert Luking

Robert Luking has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8687483
    Abstract: An apparatus to generate test traffic for testing a network. A scheduler may provide packet definition data for a sequence of packets, each packet associated with a respective flow control group. A channelized schedule FIFO (first-in first-out) queue may store the packet definition data. The channelized schedule FIFO queue may include multiple parallel channels, each channel dedicated to storing packet definition data associated with a corresponding flow control group. A plurality of non-channelized packet builder lanes may build packets in accordance with packet definition data read from the channelized schedule FIFO. A channelized output FIFO buffer may store packets built by the plurality of packet builder lanes. The channelized output FIFO buffer may include multiple parallel channels, each channel dedicated to storing packets associated with a corresponding flow control group. An output multiplexor may interleave packets from the channelized output FIFO buffer to form the test traffic.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: April 1, 2014
    Assignee: Ixia
    Inventors: Michael Hutchison, Christopher Kowalski, Robert Luking
  • Publication number: 20110007754
    Abstract: A traffic generator may include a scheduler to provide packet forming data defining a packet; a background engine to retrieve a packet template, the packet template including a first checksum mask, a first pre-sum, and a first address; a fill engine to generate content for variable-content fields of the packet for a payload portion of the packet in accordance with the packet forming data and the packet template; and a checksum engine. The checksum engine may include an accumulator that calculates a payload checksum for the payload portion of the packet and first logic circuits that compute a first checksum based on the first pre-sum, the first mask, and at least some of the payload checksum and the variable-content fields. Insertion logic may insert the first checksum into the packet at a position indicated by the first address.
    Type: Application
    Filed: July 10, 2009
    Publication date: January 13, 2011
    Inventors: Gerald Pepper, Robert Luking, Xuegen Zhu