Abstract: A method of modifying a semiconductor device to provide electrical parameter monitoring. The device includes a semiconductor die and a package substrate. The substrate includes a conductive plane. The die is connected to the plane via a plurality of connection structures. The method includes disconnecting a first one of the connection structures from the plane, and connecting the first connection structure to an external package connection, thereby providing a capability to monitor an electrical parameter of the die via the external package connection.

Abstract: A method of modifying a semiconductor device to provide electrical parameter monitoring. The device includes a semiconductor die and a package substrate. The substrate includes a conductive plane. The die is connected to the plane via a plurality of connection structures. The method includes disconnecting a first one of the connection structures from the plane, and connecting the first connection structure to an external package connection, thereby providing a capability to monitor an electrical parameter of the die via the external package connection.

Abstract: A sequencing system for sequencing a first node voltage at a first node and a second node voltage at a second node which is less than the first node voltage is disclosed. The sequencing system includes a bias circuit configured to provide a bias current in response to the first node voltage beginning to change to a first supply voltage. The sequencing system includes a switch configured to provide a low impedance path between the first node and the second node when the bias circuit is providing the bias current. The switch is configured to provide a high impedance path when the second node voltage is within a range of a second supply voltage which is less than the first supply voltage.

Abstract: A sequencing system for sequencing a first node voltage at a first node and a second node voltage at a second node which is less than the fire node voltage is disclosed. The sequencing system includes a bias circuit configured to provide a bias current in response to the first node voltage beginning to change to a first supply voltage. The sequencing system includes a switch configured to provide a low impedance path between the first node and the second node when the bias circuit is providing the bias current. The switch is configured to provide a high impedance path when the second node voltage is within a range of a second supply voltage which is less than the first supply voltage.

Abstract: A method of modifying a semiconductor device to provide electrical parameter monitoring. The device includes a semiconductor die and a package substrate. The substrate includes a conductive plane. The die is connected to the plane via a plurality of connection structures. The method includes disconnecting a first one of the connection structures from the plane, and connecting the first connection structure to an external package connection, thereby providing a capability to monitor an electrical parameter of the die via the external package connection.

Abstract: Magnetic head signal slimming is achieved using a differential, low order, lumped element, LC ladder network, having a single adjustment, differential feed forward equalization circuit, to provide pulse slimming and a variable, peaked amplitude response without varying the delay (phase) response of the network. The feed forward adjustment is easily varied by selection of the control signal input thereto so that the network gain and the slimming or pulse narrowing of the network is tailored for the difference in pulse widths produced by magnetic heads, which vary over the surface of the magnetic media and which vary from one magnetic head to another.

Abstract: An apparatus is disclosed for detecting the peaks of a signal recorded on a magnetic storage medium. An absolute value circuit is used to generate an output that is approximately equivalent to the mathematical absolute value of the raw signal input from the storage medium. The absolute value signal is then coupled to both a differentiator circuit and a noise rejection comparator circuit. A second comparator which detects the zero voltage crossings of the differentiator circuit is enabled and disabled by the output from the noise rejection comparator so that transitions of opposite polarity are produced, corresponding to the peaks and positive going reference level crossings of the raw signal input, while noise on the raw signal input below a qualification level established by the noise rejection comparator circuit is rejected.

Abstract: A method and means is disclosed for restoring the direct-current component of a signal read from a storage medium in the form of isolated analog signals which are simultaneously applied to a differentiator and a binary signal generator. The positive pulses of the analog signals trigger the binary signal generator that produces binary signals which initiate and terminate offset signals provided by an offset signal generator. An offset signal is summed differentially with the differentiated analog signal, providing a reconstructed signal which is applied to a zero-crossing detector which produces an output that is either a logical high or low, and that is capable of being processed by digital techniques. The positive-going transitions in the binary signal are equivalent to level transitions of an originally recorded signal.