Abstract: Packaging processes and structures provide thin-film interconnects for high performance signal transmission of high frequency signals. The thin-film interconnects can be formed on a carrier that is at least partly removed for formation of terminals such as a BGA connected to the thin-film interconnects. Removal of the carrier can leave a frame for handling of the thin-film interconnects during subsequent processing. The thin film interconnects can be used to route signals to external terminals, between dies, or between functional units within a die. This allows the dies to contain fewer routing layers and allows configuration of a device such as an ASIC during packaging. A coarser pitch interconnect structure can be fabricated on the carrier using different technology for power and ground management and/or in a core that attaches to the thin-film package structure.

Abstract: A probing system or process for electrical testing of a device fabricated on a wafer also conditions terminals such as solder balls on the device to improve uniformity of the heights of the terminals and improve the reliability of connections to an interconnect substrate in a flip-chip package or to a printed circuit board in a chip-on-board application. The system can employ a probe card that is a printed circuit board and/or is substantially identical to interconnect substrates used in flip-chip packaging. The probe card can be replaceable on a test head to allow for quick changes the reduce ATE downtime and to accommodate device changes such as a die shrink. Probe tips on the probe card can be the contact pads or bumps that are the normal electrical contact structures of the interconnect substrates.

Abstract: A dam or barrier around the periphery of a die in a flip-chip package changes the shape of the underfill to reduce stress resulting from edge effects. The dam can include a treated region of a substrate having an affinity to an underfill material. The treated region causes liquid underfill material to bead, thereby controlling the wetting angle of the underfill material and shaping the underfill to eliminate sources of stress such as underfill fillet regions that are subject to significant shrinkage. The dammed underfill additionally avoids or reduces the extent of areas having thermal coefficients of expansion that differ from the optimal level because of low filler particle concentration.

Abstract: A probing system or process for electrical testing of a device fabricated on a wafer also conditions terminals such as solder balls on the device to improve uniformity of the heights of the terminals and improve the reliability of connections to an interconnect substrate in a flip-chip package or to a printed circuit board in a chip-on-board application. The system can employ a probe card that is a printed circuit board and/or is substantially identical to interconnect substrates used in flip-chip packaging. The probe card can be replaceable on a test head to allow for quick changes the reduce ATE downtime and to accommodate device changes such as a die shrink. Probe tips on the probe card can be the contact pads or bumps that are the normal electrical contact structures of the interconnect substrates.

Abstract: A dam or barrier around the periphery of a die in a flip-chip package changes the shape of the underfill to reduce stress resulting from edge effects. The dam can include a treated region of a substrate having an affinity to an underfill material. The treated region causes liquid underfill material to bead, thereby controlling the wetting angle of the underfill material and shaping the underfill to eliminate sources of stress such as underfill fillet regions that are subject to significant shrinkage. The dammed underfill additionally avoids or reduces the extent of areas having thermal coefficients of expansion that differ from the optimal level because of low filler particle concentration.

Abstract: A flip-chip packaging method for a semiconductor device treats a portion of an interconnect substrate so that a fill material when liquid beads on the treated portion of the interconnect substrate. When the fill material is dispensed on the interconnect substrate to fill a gap under the semiconductor device, the beading of the fill material prevents formation of fillets that might otherwise create a variation in the thermal coefficient of expansion of fill material and/or warp the interconnect substrate. The treated portion of the interconnect substrate can be roughened or coated with a material that differs from other portions of the interconnect substrate and thereby causes beading.

Abstract: A flip-chip package uses a substrate having bond pad spacing that matches terminal spacing on a chip at an elevated temperature that is an expected operating temperature of the chip. The elevated temperature can be the midpoint of the desired temperature cycle of the chip so that deformations of the electrical connections in one direction balance deformations in the opposite direction during temperature cycling. Matching spacing at an elevated temperature, even a temperature less than the bonding temperature, permits a better alignment at the bonding temperature for formation of stronger bonds.

Abstract: A flip-chip package and packaging method use a substrate having bond pad spacing that matches terminal spacing on a chip at an elevated temperature, such as the temperature of the chip during bonding to the substrate, the melting point of solder used on the chip, a temperature within the range of thermal cycling of the chip, or an operating temperature of the chip. Matching spacing at an elevated temperature permits a better alignment at the bonding temperature for formation of stronger bonds.

Abstract: A flip-chip package uses a substrate having bond pad spacing that matches terminal spacing on a chip at an elevated temperature, such as the temperature of the chip during bonding to the substrate, the melting point of solder used on the chip, a temperature within the range of thermal cycling of the chip, or an operating temperature of the chip. Matching spacing at an elevated temperature permits a better alignment at the bonding temperature for formation of stronger bonds.

Abstract: A process for fabricating a BGA flip chip package containing a stiffener or heat spreader monitors edges of the adhesive that attaches the stiffener or heat spreader. The monitoring ensures that the adhesive extends beyond the centers of the outermost solder balls in the BGA. Stress at the edge of the adhesive thus does not cause warping or variations within the BGA.

Abstract: A flip-chip package and packaging method use a substrate having bond pad spacing that matches terminal spacing on a chip at an elevated temperature, such as the temperature of the chip during bonding to the substrate, the melting point of solder used on the chip, a temperature within the range of thermal cycling of the chip, or an operating temperature of the chip. Matching spacing at an elevated temperature permits a better alignment at the bonding temperature for formation of stronger bonds.

Abstract: A dam or barrier around the periphery of a die in a flip-chip package changes the shape of the underfill to reduce stress resulting from edge effects. The dam controls the wetting angle of the underfill material to provide a much smaller stress component perpendicular to the surface of the underlying substrate and shapes the underfill to eliminate sources of stress such as underfill fillet regions that are subject to significant shrinkage. The dammed underfill additionally avoids or reduces the extent of areas having thermal coefficients of expansion that differ from the optimal level because of low filler particle concentration.

Abstract: A process for fabricating a BGA flip chip package containing a stiffener or heat spreader monitors edges of the adhesive that attaches the stiffener or heat spreader. The monitoring ensures that the adhesive extends beyond the centers of the outermost solder balls in the BGA. Stress at the edge of the adhesive thus does not cause warping or variations within the BGA.

Abstract: The present invention is a process and apparatus for the synthesis and growth of single crystals of phosphorus compounds starting with the elemental materials in a single furnace without external exposure. The apparatus of the present invention is a crystal growth furnace heated by RF coils. Inside the furnace is a susceptor for holding a crucible. Above the crucible is selectively positioned a phosphorus improved injector. The non-phosphorus materials are placed in the crucible and melted to a desired temperature. The phosphorus material previously placed within the injector is heated by the radiant heat from the crucible to drive the phosphorus vapor into the melt through a tube. This is closely controlled by noting the temperature within the injector and adjusting the height of the injector above the melt to control the temperature within the phosphorus material. After the formation of the stoichiometric melt, the seed is inserted into the melt for crystal growth if so desired.

Abstract: Twin-free (100) InP crystals of large dimensions and having flat crowns are produced by combining the magnetic liquid encapsulated Kyropoulos (MLEK) process and the magnetic liquid encapsulated Czochralski (MLEC) process. Observation of the flat crown by high intensity light ensures twin-free growth in the magnetic environment.

Abstract: In the liquid encapsulated Kyropoulos process, the crystal is allowed to grow to the limits of the crucible and remain under the encapsulant fluid. In order to relieve the melt pressure between the growing crystal and the crucible, at least one capillary pressure relief hole is placed in the crucible which allows some of the melt to leak therefrom to relieve pressure.

Abstract: A heat pipe coracle is provide for use in a crystal growth apparatus; the heat pipe coracle includes a coracle ring, the coracle ring being composed of a material resistant to attack from a melt of the crystal growth apparatus and having density less than the melt so as to float upon the melt, the coracle ring having a central opening therethrough, the central opening being of a diameter approximately equal to that of a single crystal pulled from the melt through said central opening, the single crystal being in sliding contact with the coracle ring to insure uniform heat distribution about a vertical axis near an interface between the single crystal and the melt, and means for centering the coracle ring within a crucible of the crystal growth apparatus, the means for centering fixedly attached to the coracle ring and resistant to attack from said melt, the means for centering being in sliding contact with the wall of the crucible so that the heat pipe coracle can float upon said melt and below an encapsulati