Patents by Inventor Robert M. Lanoue

Robert M. Lanoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8299767
    Abstract: In some implementations, a method of dynamically maintaining a device's operation within a safe operating area (SOA) may include sensing instantaneous voltage and current of the device; determining, based on the sensed instantaneous voltage and current, a value that represents a power dissipated in the device; using the determined dissipated power and a model of thermal behavior of the device to model a junction temperature of the device; and controlling operation of the device based on the modeled junction temperature. A programmable SOA circuit including sensing, scaling, filtering, and controlling functions may be packaged on a single die or in a package with a power transistor.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: October 30, 2012
    Assignee: Picor Corporation
    Inventors: Claudio Tuozzolo, Aiman Alhoussami, John P. Clarkin, Robert M. Lanoue, Andreas Gerasimos Ladas
  • Patent number: 5719491
    Abstract: An output driver for providing a gate voltage to an external positive-channel field-effect transistor (PFET) device. A capacitor accumulates charge which, upon switching by an input switching signal, is applied, in addition to the supply voltage, to the base of a drive circuit NPN transistor to rapidly pull the PFET gate voltage, derived at the emitter of the drive circuit NPN transistor, up to the supply voltage. An active voltage limiter, coupled in parallel with the drive circuit, limits excursion of the gate voltage with respect to the supply voltage.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: February 17, 1998
    Assignee: Cherry Semiconductor Corporation
    Inventors: Frank J. Kolanko, Robert M. Lanoue