Abstract: A fluid mixing apparatus for mixing a fluid in a circular container includes a circular lid for engaging the open top container. A shaft is rotatably positioned through the lid and is rotatable about a shaft axis. A mixer is attached to the shaft adjacent one end for rotating with the shaft in a plane perpendicular to the shaft axis. The mixer receives the shaft. The mixer has a fixed portion and a hinged portion hingedly connected to the fixed portion. An agitator is mounted to the shaft for agitating a fluid when the apparatus is mounted in a container.

Abstract: A random access memory including address error checking. The random access memory includes an address decoder that activates data cells from among the plurality of data cells in the memory. The random access memory also includes an address encoder that supplies an address determined by the data cells activated. The address from the encoder is compared with the address input to the decoder and if the two address are different an error indication is provided.

Abstract: An integrated circuit fault detection system. The integrated circuit fault detection system includes gate means associated with each functional input and functional output of the chip. The gate means are connected between the functional input and functional output terminals and the bonding pad and are controllable to allow the chip to operate in normal fashion using the input and output terminals thereof and the bonding pads associated therewith. The gate means are also controllable to read test data into a functional input terminal of the chip, write test data out of the functional output terminal of the chip, drive test data from chip functional circuitry through the bonding pad off chip, and accept test data from the outside world through a bonding pad and transfer the test data to chip functional circuitry. The test results can then be analyzed to determine if the chip is functioning properly.

Abstract: The combination of an amplifier with a capacitor connected between an input and output terminal is coupled to a data bus to effectively reduce the effective capacitance on the bus and thus enhance the response time of information sent through the data bus.

Abstract: Bidirectional circuitry, which includes two amplifiers, each having a capacitor connected between an input and an output terminal thereof, and two interrupt transistors, acts to provide amplification and/or level shifting of information between two transceivers while also reducing capacitive loading and thus enhancing response time.