Patents by Inventor Robert M. Stitt
Robert M. Stitt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5130572Abstract: A track-and-hold circuit that consists of an operational amplifer wherein the same capacitors are used for phase compensation and as differential holding capacitors. The circuit is switched from track to hold by turning off the input stage by reverse biasing base-emitter junctions through current steering in combination with resistor clamping. Low impedance during the hold mode is maintained because one half of the differential compensation path is connected to the output. Feed-through is eliminated by cascoding the first stage and turning off the cascode devices through current steering with resistor clamping during the holding mode. The holding capacitors' droop due to bias currents is minimized by current cancellation of the second stage.Type: GrantFiled: December 26, 1990Date of Patent: July 14, 1992Assignee: Burr-Brown CorporationInventors: Robert M. Stitt, David J. Kunst
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Patent number: 4636916Abstract: Method and apparatus for minimizing unpredictable sources of noise, or error voltages, at the microvolt level in precision analog components such as operational amplifiers is described. Sources of such error voltages are temperature gradients across the dice of the precision components enclosed in a hermetically sealed package, thermoelectric voltages caused by temperature differences between junctions of leads of the package with other metals, and light reflected from the substrate through the glass seals around the leads in the base of such packages. A skirted heat sink is positioned in thermal contact with the sides of the package which package is mounted on a substrate. The heat sink transfers heat from the heat sink to its ambient environment by radiation and convection to maintain the temperature within the package substantially constant.Type: GrantFiled: May 24, 1985Date of Patent: January 13, 1987Assignee: Burr-Brown CorporationInventors: Rodney T. Burt, Robert M. Stitt
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Patent number: 4616188Abstract: An isolation amplifier circuit is described that utilizes a magnetic field in combination with a Hall effect device to isolate input signals and output signals. The input signal is applied to a conducting coil that produces a magnetic field in a Hall effect material through which current is flowing. Because of the Hall effect, terminals on the sides of the Hall effect material can provide a voltage difference. This voltage difference is amplified and applied to a second conducting coil. The second conducting coil is adapted to provide a magnetic field in the opposite direction from the magnetic field produced by the input signal. When the magnetic fields are identical, no difference in current flowing through the two terminals will be present. The output signal of the difference amplifier circuit will be a function of the input signal. According to a second embodiment, apparatus is included for cancelling ambient magnetic fields.Type: GrantFiled: June 20, 1985Date of Patent: October 7, 1986Assignee: Burr-Brown CorporationInventors: Robert M. Stitt, Rodney T. Burt
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Patent number: 4467286Abstract: A ladder network includes a plurality of cascaded prototype network sections connection in cascade and terminated with a termination resistor. The sections each provide gains of 1/2, 2/5, 1/5 and 1/10. Linear circuits are also disclosed which utilize at least one amplifier and the ladder network in a feedback loop.Type: GrantFiled: November 8, 1982Date of Patent: August 21, 1984Assignee: Burr-Brown CorporationInventor: Robert M. Stitt
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Patent number: 4438338Abstract: Means and method is disclosed for achieving a low profile optical coupling to a module comprising an optoelectronic device together with other circuitry. Maintaining the optoelectronic device parallel to the substrate on which it and the associated circuitry are mounted enables the use of standard, well known manufacturing assembly techniques while providing electrical connection to the electric ports of said optoelectronic device. Subsequent to the electrical interconnection operation, the optoelectronic device is moved, together with its connections, to a position substantially orthogonal with the mounting substrate. Optical fiber, light coupling is utilized. The low profile of the overall module package is achieved by introducing the optical fiber in a direction generally parallel with the substrate and perpendicular to the light active surface of the optic port of the optoelectronic device.Type: GrantFiled: November 5, 1981Date of Patent: March 20, 1984Assignee: Burr-Brown Research CorporationInventors: Robert M. Stitt, Neil P. Albaugh
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Patent number: 4346294Abstract: Means and method for achieving a low profile optical coupling to a planar mounted optoelectronic device. Maintaining the optoelectronic device planar to the substrate on which it and associated circuitry are mounted enables the use of standard, well known manufacturing assembly techniques while providing electrical connection to the electric ports of said optoelectronic device. Optical fiber, light coupling is utilized. The low profile of the overall package is achieved by introducing the optical fiber on a plane which is generally parallel to the light-active surface of the optic port of said optoelectronic device. Actual optical coupling is achieved by introducing a smooth radius bend in the optical fiber so as to bring the fiber and the light-active surface of the optoelectronic device into generally orthogonal relationship. A glass-to-metal seal is provided where the optic fiber enters the package so as to provide a hermetic seal.Type: GrantFiled: July 6, 1981Date of Patent: August 24, 1982Assignee: Burr-Brown Research Corp.Inventors: Neil P. Albaugh, Robert M. Stitt
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Patent number: 4303934Abstract: A molded dual in line package is disclosed which has at least one cavity in a first major molded surface thereof into which an integrated circuit chip can be mounted and wire bonded. After the circuit is tested and adjusted, the cavity is sealed with a metal plate. Other embodiments are disclosed which include a second cavity in a second major molded surface of the package which may house or contain a second integrated circuit, an epoxy sealer, or a substrate.Type: GrantFiled: August 30, 1979Date of Patent: December 1, 1981Assignee: Burr-Brown Research Corp.Inventor: Robert M. Stitt
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Patent number: 4218578Abstract: This disclosure relates to a housing or enclosure for an electronic component such as a hybrid module to provide RF shielding therefor. The RF shield has a gap separating two parts of the housing or enclosure to provide D.C. isolation between input and output electrical grounds. In one embodiment, the gap is attained by positioning a split metal sheet or layer within dielectric material such as an inner and outer layer of plastic material. Thus, the gap between the split portions of the RF shield is fixed, set or positioned during the formation of the sandwich dielectric-metal-dielectric structure. The gap has a very narrow spacing to obtain optimum RF shielding while still providing D. C. isolation. The dielectric material in the gap between the two split metal portions of the RF shield prevents electrical arcing between the split portions. In another embodiment, a dielectric, gap forming and metal holding (and separating) member is used to separate the two metal portions of the RF shield.Type: GrantFiled: August 4, 1978Date of Patent: August 19, 1980Assignee: Burr-Brown Research Corp.Inventors: Wilfred W. Olschewski, Robert M. Stitt
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Patent number: 4121168Abstract: A complementary transistor output circuit and method incorporates an optical coupler including a light emitting diode and a phototransistor connected between the base electrodes of a complementary pair of output transistors including a PNP transistor and an NPN transistor. The emitter of each of the output transistors is connected to an output of the output circuit. The base electrodes of the PNP output transistor and the NPN output transistor are connected, respectively, to first and second current source circuits. The collector electrode of the NPN output transistor is coupled by means of a first feedback circuit including a first resistor and a PNP transistor to the anode of a light emitting diode. The collector electrode of the PNP output transistor is coupled by means of a second feedback circuit to include a second resistor and an NPN transistor to the cathode of the light emitting diode.Type: GrantFiled: August 24, 1977Date of Patent: October 17, 1978Assignee: Burr-Brown Research CorporationInventor: Robert M. Stitt
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Patent number: 4112308Abstract: An optical coupling system is described incorporating a light emitting semiconductive device mounted on a substrate having an electrically conductive strip leading to and from the device. A plurality of photo detector, semiconductive devices are mounted on the substrate adjacent to and co-planar with the light emitting device. A housing is mounted over the semiconductive devices and is filled with a clear light transmitting resin; the interior surfaces of the housing are light reflecting so that light emitted by the light emitting semiconductive device is reflected and diffused therefrom impinging upon each of the photo detector, semiconductive devices.Type: GrantFiled: September 6, 1977Date of Patent: September 5, 1978Assignee: Burr-Brown Research CorporationInventors: Wilfred W. Olschewski, Robert M. Stitt