Abstract: A system for inspecting a wire segment includes an inspection apparatus and a visual imaging device. The apparatus includes an array of mirrors positioned about a centerline of the apparatus, wherein each mirror in the array is oriented such that a reflection of a first inspection zone of the wire segment in the array of mirrors forms a circumferential view of the first inspection zone of the wire segment, and the reflection from each mirror is within a field of view from a single vantage point. The visual imaging device is positioned at the single vantage point and oriented towards the wire segment such that the reflection from each mirror of the array of mirrors is within a field of view of the visual imaging device, the visual imaging device configured to capture at least one image of the reflection of the wire segment from the array of mirrors.

Abstract: Described examples include a resistor having a substrate having a non-conductive surface and a patterned polysilicon layer on the non-conductive surface, the patterned polysilicon layer including polycrystalline silicon wherein at least 90% of the grains in the polycrystalline silicon are 30 nm or smaller. The resistor also has a first terminal in conductive contact with the patterned polysilicon layer and a second terminal in conductive contact with the polysilicon layer and spaced from the first contact.

Abstract: Apparatus, and their methods of manufacture, that include an insulating feature above a substrate and a resistor formed on the insulating feature. Forming the resistor includes depositing polysilicon and doping the polysilicon (e.g., in-situ) with a carbon dopant and/or an oxygen dopant.

Abstract: A method of manufacturing an electronic device includes forming a shallow trench isolation (STI) structure on or in a semiconductor surface layer and forming a mask on the semiconductor surface layer, where the mask exposes a surface of a dielectric material of the STI structure and a prospective local oxidation of silicon (LOCOS) portion of a surface of the semiconductor surface layer. The method also includes performing an oxidation process using the mask to oxidize silicon in an indent in the dielectric material of the STI structure and to grow an oxide material on the exposed LOCOS portion of the surface of the semiconductor surface layer.

Abstract: Described examples include a resistor having a substrate having a non-conductive surface and a patterned polysilicon layer on the non-conductive surface, the patterned polysilicon layer including polycrystalline silicon wherein at least 90% of the grains in the polycrystalline silicon are 30 nm or smaller. The resistor also has a first terminal in conductive contact with the patterned polysilicon layer and a second terminal in conductive contact with the polysilicon layer and spaced from the first contact.

Abstract: A method of forming a semiconductor device for improving an electrical connection. The semiconductor device includes a top metal layer. A protective dielectric layer is formed over the top metal layer. A sintering operation is performed while the top metal layer is covered by the protective dielectric layer. After the sintering operation, the protective dielectric layer is patterned to expose areas on the top metal layer for bond pads of the semiconductor device. A bond pad cap is formed on the top metal layer where exposed by the protective dielectric layer.