Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. One embodiment of the reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat.

Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.

Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structure comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate.

Abstract: A halogen-free dielectric resin mixture is described for use in microvia and other similar applications. The resin mixture contains a cyanate ester monomer or prepolymer a bismaleimide, an epoxy and a flame inhibiting compound selected from the group consisting of a phosphinic acid anhydride, a phosphonic acid andydride and a phosphonic acid half-ester. The flame inhibitor is present in an amount wherein the elemental phosphorus content is between about 2% and about 20% by weight, based on the weight of the resin mixture. The resin mixture can also include one or more coloring, fluorescent and UV absorbing agents. Prepregs based on the resin mixture with inorganic or organic reinforcing agents, as well as circuit boards and chip carriers made from the prepregs are also described. A resin coated article for use in microvia laser applications is likewise included.

Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. One embodiment of the reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat.

Abstract: A halogen-free dielectric resin mixture is described for use in microvia and other similar applications. The resin mixture contains a cyanate ester monomer or prepolymer a bismaleimide, an epoxy and a flame inhibiting compound selected from the group consisting of a phosphinic acid anhydride, a phosphonic acid andydride and a phosphonic acid half-ester. The flame inhibitor is present in an amount wherein the elemental phosphorus content is between about 2% and about 20% by weight, based on the weight of the resin mixture. The resin mixture can also include one or more coloring, fluorescent and UV absorbing agents. Prepregs based on the resin mixture with inorganic or organic reinforcing agents, as well as circuit boards and chip carriers made from the prepregs are also described. A resin coated article for use in microvia laser applications is likewise included.

Abstract: A method for coating cloth especially fiberglass sheets with a thermosetting resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin/solvent mixture while maintaining at least some of the interstices or openings essentially free of the solvent mixture. This first coating is then partially cured to between about 70% and 90% of full cure. The coated fiberglass with partially cured resin thereon is then given a second coating of either the same or different thermosetting resin mixture which coats the first coating and fills in the interstices between the fibers. This second coating is then partially cured, which advances the cure of the first coating past 80% full cure and results in an impregnated fiberglass cloth structure for use as sticker sheets.

Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate.

Abstract: The present invention is a method of providing a protective covering on an electronic package including a first circuitized substrate, a semiconductor chip positioned on and electrically coupled to the first substrate, and a plurality of conductors also on the substrate for electrically connecting the substrate to an external circuitized substrate. In one version, the method comprises covering substantially all of the external surfaces of the substrate, the semiconductor chip and a portion of the plurality of conductors with a protective covering from immersion in a dielectric solution (e.g., TEFLON AF). The coatings can also be applied by brushing, spraying, or chemical vapor deposition. In an alternative embodiment, all of the external surfaces, including all of the conductors, are coated with the protective covering (e.g., to facilitate package shipment or other handling). The resulting electronic packages are also described herein.

Abstract: The present invention is a method of providing a protective covering on an electronic package including a first circuitized substrate, a semiconductor chip positioned on and electrically coupled to the first substrate, and a plurality of conductors also on the substrate for electrically connecting the substrate to an external circuitized substrate. In one version, the method comprises covering substantially all of the external surfaces of the substrate, the semiconductor chip and a portion of the plurality of conductors with a protective covering from immersion in a dielectric solution (e.g., TEFLON AF). The coatings can also be applied by brushing, spraying, or chemical vapor deposition. In an alternative embodiment, all of the external surfaces, including all of the conductors, are coated with the protective covering (e.g., to facilitate package shipment or other handling). The resulting electronic packages are also described herein.

Abstract: The invention relates to subtractive and additive processes for creating a circuitized cavity in a printed circuit board. Additionally, the invention includes a circuitized cavity and a printed circuit board with a circuitized cavity. The circuitized cavity provides for a variety of advantages over wire bonds.

Abstract: An electroplating apparatus provides high current electrical connections in a small area to a workpiece. The contact area may use a dendrite surface to improve the connection. An insulative gasket prevents electroplating fluids from entering the region about the contact area. A heavy core laminated within a supporting structure provides uniform current distribution of high electrical currents to the dendrite covered contact areas.

Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate.

Abstract: A method for coating cloth especially fiberglass sheets with a resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin solvent mixture as well as most of the interstices or openings, although some of the interstices or openings have holes where the coating does not completely fill in. This first coating is then partially cured to the extent that it will not redissolve in a second coating of the same resin solution. The coated fiberglass with partially cured resin thereon is then given a second coating of the same resin mixture which coats the first coating and fills in any holes in the first coating. This second coating is then partially cured, which advances the cure of the first coating and results in an impregnated fiberglass cloth structure for use as sticker sheets. This substantially reduces pinholing.

Abstract: A method for coating cloth especially fiberglass sheets with a thermosetting resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin/solvent mixture while maintaining at least some of the interstices or openings essentially free of the solvent mixture. This first coating is then partially cured to between about 70% and 90% of full cure. The coated fiberglass with partially cured resin thereon is then given a second coating of either the same or different thermosetting resin mixture which coats the first coating and fills in the interstices between the fibers. This second coating is then partially cured, which advances the cure of the first coating past 80% full cure and results in an impregnated fiberglass cloth structure for use as sticker sheets.

Abstract: A method for coating cloth especially fiberglass sheets with a thermosetting resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin/solvent mixture while maintaining at least some of the interstices or openings essentially free of the solvent mixture. This first coating is then partially cured to between about 70% and 90% of full cure. The coated fiberglass with partially cured resin thereon is then given a second coating of either the same or different thermosetting resin mixture which coats the first coating and fills in the interstices between the fibers. This second coating is then partially cured, which advances the cure of the first coating past 80% full cure and results in an impregnated fiberglass cloth structure for use as sticker sheets.

Abstract: A method for making a printed circuit with a cavity is disclosed. The method comprises the step of laying a sticker sheet on a first, metallized dielectric layer and laying a second, metallized dielectric layer on the sticker sheet. The second metallized dielectric layer and the sticker sheet each have a window which is registered with the other window forming a cavity. Next, a flexible release layer is laid above the second metallized dielectric layer and a thermosetting visco-plastic material is laid on the release layer over the cavity. Next the first and second metallized dielectric layers, sticker sheet, release layer and visco-plastic material are laminated by heat and pressure to cure the sticker sheet and thereby bind the first and second metallized dielectric sheets to each other. During the lamination step, the sticker sheet flows to the perimeter of the cavity.

Abstract: A method for coating cloth especially fiberglass sheets with a thermosetting resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin/solvent mixture while maintaining at least some of the interstices or openings essentially free of the solvent mixture. This first coating is then partially cured to between about 70% and 90% of full cure. The coated fiberglass with partially cured resin thereon is then given a second coating of either the same or different thermosetting resin mixture which coats the first coating and fills in the interstices between the fibers. This second coating is then partially cured, which advances the cure of the first coating past 80% full cure and results in an impregnated fiberglass cloth structure for use as sticker sheets.

Abstract: A method and resultant article are provided which optimize the adhesion of resin to the glass fibers in fiberglass cloth impregnated with a resin and also optimize the adhesion of the impregnated resin to metal sheets laminated to the resin-impregnated cloth. The fiberglass is treated in two or more passes. On the first pass, the fiberglass is impregnated with a first resin which is optimized for adherence to glass fibers and the coated resin is partially cured. In a last pass, the fiberglass is impregnated with a second resin, which is different from said first resin, and is optimized for bonding to metal. The second resin is then partially cured. The first and second resins are selected such that they form a bond with each other when cured.

Abstract: An integrated circuit chip package with an integrated chip carrier having differing coefficients of thermal expansion (CTE) in the x-y plane. The chip carrier is comprised of two main regions. The first is a core region having a CTE approximately equal to that of the semiconductor chip CTE. This core region also has approximately the same dimensions in the x-y plane as the semiconductor chip. The chip is mounted just above this core region. The second region is a peripheral region which surrounds the core region in the x-y plane. This second region has a CTE approximately equal to that of the printed circuit board CTE. During thermal cycling, the materials expand and contract. The core region expands at nearly the same rate as the chip and the area outside the chip footprint, the peripheral region, expands at a rate similar to that of the printed circuit board. This characteristic prevents thermal stress-induced fatigue on the package components and solder joints.