Abstract: A system for producing a notification. The system includes a control device that includes a processor, a master clock operably connected to the processor and configured to produce a master clock signal, a user interface operably connected to the processor and configured to generate an operational sequence based upon a user input, and a transmitter operably connected to the processor and configured to transmit the master clock signal and the operational sequence. The system further includes a plurality of output devices configured to establish a connection with the control device, to receive the master clock signal and the operational sequence via the established connection, and to produce a synchronized notification based upon the master clock signal and the operational sequence. The synchronized notification may include flashing lights, audible sounds, or other similar displays.

Abstract: A method and apparatus for enhancing the speed of operation of a computer consists of providing a cache memory which is faster than the computer's main memory, disabling the computer's main microprocessor, and replacing it with a microprocessor with a faster clock cycle time. A portion of the program stored in the main memory is stored in the cache memory. The addresses of the portion of the main memory stored in the cache memory are noted in a tag RAM. Upon each addressing sequence during the execution of a program, the tag RAM is examined to determine if the addressed located is stored in the cache memory. If the stored location is identified in the tag RAM, it is retrieved from the cache memory at high-speed. Otherwise, the data in the address location is retrieved from main memory at a slower speed and written into the cache memory so that subsequent accesses may be made at high-speed.