Abstract: A plant-based beverage is disclosed. The beverage comprises: (a) an amount of a first liquid; (b) an amount of an oat-derived protein; and (c) an amount of a chickpea-derived protein. In some embodiments, the beverage further comprises a prebiotic fiber. A method for making a plant-based beverage comprising: liquids mixed to make a liquid mixture comprising: an amount of water; an amount of liquid flavor; an amount of a plant-based oil; solids are added to the mixture comprising: an amount of oat-derived protein; an amount of chickpea-derived protein; agitating the mixture until the solids are dispersed in solution. A method of altering the microbiome in the gastrointestinal tract of a subject is disclosed. The method comprising: orally administering to the subject a liquid comprising: an oat protein and a chickpea protein; so as to alter the microbiome in the gastrointestinal tract of the subject as compared to an untreated control.

Abstract: A method for predicting and controlling leakage wherein an IDDQ prediction macro is placed in a plurality of design topographies and data is collected using the IDDQ prediction macro. The IDDQ prediction macro is configured to measure subthreshold leakage and gate leakage for at least one device type in a semiconductor test site and in scribe lines using the IDDQ prediction macro and establish a leakage model. The method correlates the semiconductor test site measurements and the scribe line measurements to establish scribe line control limits, predicts product leakage; and sets subthreshold leakage limits and gate leakage limits for each product using the leakage model.

Abstract: The present disclosure relates to nutritional compositions comprising a prebiotic component for inhibiting adherence of pathogens in the gastrointestinal tract of a subject and to the prebiotic component, which comprises galactooligosaccharide, polydextrose or any mixture thereof. The nutritional compositions of the present disclosure comprise a fat or lipid source, a protein source, and a carbohydrate source comprising an effective amount of the prebiotic component.

Abstract: An integrated circuit device includes component devices (that include primary and alternate devices) and storage elements connected to the component devices. The storage elements store different sets of repair addresses indicating which of the primary devices and alternate devices are to be enabled. Further, a controller is connected to the storage elements, and a temperature sensor is connected to the controller. The temperature sensor senses the temperature. The controller selects one of the different storage elements to select at least one of the sets of repair addresses based on the temperature sensed by the temperature sensor. The sets of repair addresses share use of at least one of the alternate devices and at least one of the primary devices.

Abstract: A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.

Abstract: An integrated circuit device comprises component devices (that include primary and alternate devices) and storage elements connected to the component devices. The storage elements store different sets of repair addresses indicating which of the primary devices and alternate devices are to be enabled. Further, a controller is connected to the storage elements, and a temperature sensor is connected to the controller. The temperature sensor senses the temperature. The controller selects one of the different storage elements to select at least one of the sets of repair addresses based on the temperature sensed by the temperature sensor. The sets of repair addresses share use of at least one of the alternate devices and at least one of the primary devices.

Abstract: A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.

Abstract: A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.

Abstract: A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.

Abstract: A block of phase change material located in a semiconductor chip is reset to an amorphous state. The block of phase change material may be connected to an internal resistance measurement circuit that can transmit the measured resistance data to input/output pads either in an analog output format or in a digital output format. Depending on the ambient temperature, the resistance of the block of phase change material changes. By measuring a fractional resistance change compared to the resistance of the phase change material at a calibration temperature, the temperature of the region around the phase change material can be accurately measured. A logic decoder and an input/output circuit may be employed between the internal resistance measurement circuit and the input/output pads. A plurality of temperature sensing circuits containing phase change material blocks may be employed in the semiconductor chip to enable an accurate temperature profiling during chip operation.

Abstract: A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.

Abstract: A circuitry access system for controlling access to addressable circuit elements of an integrated circuit. The circuitry access system includes a first storage element having a first listing of unique identifiers each identifier representing one of the addressable circuit elements. A selector distinguishes a first subset of unique identifiers from the first listing. A second storage element receives and stores the first subset in an arrangement that does not include an indication of the absence of any unique identifier of the first listing that is not included in the first subset. An output of second storage element allows a user of the integrated circuit to access one or more of the addressable circuit elements corresponding to the first subset of unique identifiers. A method of controlling access to addressable circuit elements is also provided.

Abstract: A hardware description language (HDL) design structure for performing device-specific testing and acquiring parametric data on integrated circuits, such that each chip can be tested individually without excessive test time requirements, additional silicon, or special test equipment. The HDL design structure includes a functional representation of at least one device test structure integrated into an IC design which tests a set of dummy devices that are identical or nearly identical to a selected set of devices contained in the IC. The test structures are integrated from a device under test (DUT) library according to customer requirements and design requirements. The functional representations of selected test structures are further prioritized and assigned to design elements within the design in order of priority. Placement algorithms use design, layout, and manufacturing requirements to place the selected functional representations of test structures into the final layout of the design.

Abstract: Disclosed is an across-chip temperature sensing circuit and an associated method that can be used to profile the across-chip temperature gradient. The embodiments incorporate a plurality of phase change elements distributed approximately evenly across the semiconductor chip. These phase change elements are programmed to have essentially the same amorphous resistance. Temperature-dependent behavior exhibited by each of the phase change elements individually is compared to a reference (e.g., generated by a discrete reference phase change element, generated by another one of the phase change elements, or generated by an external reference) in order to profile the temperature gradient across the semiconductor chip. Once profiled, this temperature gradient can be used to redesign and/or relocate functional cores, to set stress limits for qualification of functional cores and/or to adjust operating specifications of functional cores.

Abstract: The present invention relates to methods for diluting water-stable organosilane compositions comprising an organosilane, optionally having a non-hydrolyzable organic group, but having one or more hydrolyzable groups, and an acidified stabilizing solution prepared from at least one acid, and at least one cationic surfactant, preferably at least one quaternary ammonium salt (QAS), in water. The organosilane composition is diluted with a glycol ether. The resultant diluted organosilane composition may be used to antimicrobially treat a substrate.

Abstract: A design structure for a circuitry access system for controlling access to addressable circuit elements of an integrated circuit. The circuitry access system includes a first storage element having a first listing of unique identifiers each identifier representing one of the addressable circuit elements. A selector distinguishes a first subset of unique identifiers from the first listing. A second storage element receives and stores the first subset in an arrangement that does not include an indication of the absence of any unique identifier of the first listing that is not included in the first subset. An output of second storage element allows a user of the integrated circuit to access one or more of the addressable circuit elements corresponding to the first subset of unique identifiers.

Abstract: A block of phase change material located in a semiconductor chip is reset to an amorphous state. The block of phase change material may be connected to an internal resistance measurement circuit that can transmit the measured resistance data to input/output pads either in an analog output format or in a digital output format. Depending on the ambient temperature, the resistance of the block of phase change material changes. By measuring a fractional resistance change compared to the resistance of the phase change material at a calibration temperature, the temperature of the region around the phase change material can be accurately measured. A logic decoder and an input/output circuit may be employed between the internal resistance measurement circuit and the input/output pads. A plurality of temperature sensing circuits containing phase change material blocks may be employed in the semiconductor chip to enable an accurate temperature profiling during chip operation.

Abstract: A block of phase change material located in a semiconductor chip is reset to an amorphous state. The block of phase change material may be connected to an internal resistance measurement circuit that can transmit the measured resistance data to input/output pads either in an analog output format or in a digital output format. Depending on the ambient temperature, the resistance of the block of phase change material changes. By measuring a fractional resistance change compared to the resistance of the phase change material at a calibration temperature, the temperature of the region around the phase change material can be accurately measured. A logic decoder and an input/output circuit may be employed between the internal resistance measurement circuit and the input/output pads. A plurality of temperature sensing circuits containing phase change material blocks may be employed in the semiconductor chip to enable an accurate temperature profiling during chip operation.

Abstract: The present invention relates to water-stable compositions and compounds formed by mixing an organosilane, optionally having a non-hydrolyzable organic group, but having one or more hydrolyzable groups, and an acidified stabilizing solution prepared from at least one acid, at least one glycol ether, and at least one cationic surfactant, preferably at least one quaternary ammonium salt (QAS), in water. The present invention also relates to methods of treating a substrate by mixing or contacting the substrate with the product, compound, or composition of this invention for a period of time sufficient for treatment of the substrate, methods of antimicrobially treating a food article, methods of antimicrobially coating a fluid container, methods of dyeing and treating a substrate, and methods of antimicrobially coating a latex medical article. The invention also pertains to a treated substrate having adhered thereto the product, compound, or composition of this invention.

Abstract: The present invention relates to water-stable compositions and compounds formed by mixing an organosilane, optionally having a non-hydrolyzable organic group, but having one or more hydrolyzable groups, and an acidified stabilizing solution prepared from at least one acid, at least one glycol ether, and at least one cationic surfactant, preferably at least one quaternary ammonium salt (QAS), in water. The present invention also relates to methods of treating a substrate by mixing or contacting the substrate with the product, compound, or composition of this invention for a period of time sufficient for treatment of the substrate, methods of antimicrobially treating a food article, methods of antimicrobially coating a fluid container, methods of dyeing and treating a substrate, and methods of antimicrobially coating a latex medical article. The invention also pertains to a treated substrate having adhered thereto the product, compound, or composition of this invention.