Patents by Inventor Robert Michael Ballance

Robert Michael Ballance has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6556402
    Abstract: An overvoltage protection assembly includes a rail and a mount device. The mount device includes a base member having front and rear opposed surfaces and a mounting structure on the rear surface. The mounting structure secures the base member to the rail. An overvoltage protection module is mounted on the front surface of the base member.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: April 29, 2003
    Assignee: Raycap Corporation
    Inventors: John Anthony Kizis, Jonathan Conrad Cornelius, Robert Michael Ballance
  • Publication number: 20020196593
    Abstract: An overvoltage protection assembly includes a rail and a mount device. The mount device includes a base member having front and rear opposed surfaces and a mounting structure on the rear surface. The mounting structure secures the base member to the rail. An overvoltage protection module is mounted on the front surface of the base member.
    Type: Application
    Filed: June 21, 2001
    Publication date: December 26, 2002
    Inventors: John Anthony Kizis, Jonathan Conrad Cornelius, Robert Michael Ballance
  • Patent number: 6430020
    Abstract: An overvoltage protection device includes a housing including a first substantially planar electrical contact surface and a sidewall. The housing defines a cavity therein and has an opening in communication with the cavity. An electrode member of the device includes a second substantially planar electrical contact surface facing the first electrical contact surface and disposed within the cavity. A portion of the electrode member extends out of the cavity and through the opening. A wafer formed of varistor material and having first and second opposed, substantially planar wafer surfaces is positioned within the cavity and between the first and second electrical contact surfaces with the first and second wafer surfaces engaging the first and second electrical contact surfaces, respectively.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: August 6, 2002
    Assignee: Tyco Electronics Corporation
    Inventors: Ian Paul Atkins, Robert Michael Ballance, Jonathan Conrad Cornelius, Sherif I. Kamel, John Anthony Kizis, Clyde Benton Mabry, III
  • Patent number: 6038119
    Abstract: An overvoltage protection device includes a first electrode member having a first substantially planar contact surface and a second electrode member having a second substantially planar contact surface facing the first contact surface. A wafer formed of varistor material and having first and second opposed, substantially planar wafer surfaces is positioned between the first and second contact surfaces with the first and second wafer surfaces engaging the first and second contact surfaces, respectively. The contact surfaces may apply a load to the wafer surfaces. Preferably, the electrode members have a combined thermal mass which is substantially greater than a thermal mass of the wafer. The wafer may be formed by slicing a rod of varistor material. The device may include a housing including the first substantially planar contact surface and a sidewall, the housing defining a cavity within which the second electrode is disposed.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: March 14, 2000
    Inventors: Ian Paul Atkins, Robert Michael Ballance, Jonathan Conrad Cornelius, Sherif I. Kamel, John Anthony Kizis, Clyde Benton Mabry, III