Patents by Inventor Robert Miller, Jr.

Robert Miller, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11726904
    Abstract: A transient input/output in progress state is established during processing of an input/output testcase by a test infrastructure in a computing environment. The method includes obtaining the input/output testcase for an object having one or more pages, and processing the input/output testcase by the test infrastructure. Processing the input/output testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the input/output testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more concurrent test operations are to reference the page of the object.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: August 15, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Harris M. Morgenstern, Charles Eugene Mari, Christopher Lee Wood, Alfred Francis Foster
  • Publication number: 20230236959
    Abstract: A transient input/output in progress state is established during processing of a testcase by a test infrastructure in a computing environment. The method includes obtaining the testcase for an object having one or more pages, and processing the testcase by the test infrastructure. Processing the testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more test operations reference the page of the object.
    Type: Application
    Filed: April 5, 2023
    Publication date: July 27, 2023
    Inventors: Robert MILLER, JR., Harris M. MORGENSTERN, Charles Eugene MARI, Christopher Lee WOOD, Alfred Francis FOSTER
  • Publication number: 20230086432
    Abstract: A transient input/output in progress state is established during processing of an input/output testcase by a test infrastructure in a computing environment. The method includes obtaining the input/output testcase for an object having one or more pages, and processing the input/output testcase by the test infrastructure. Processing the input/output testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the input/output testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more concurrent test operations are to reference the page of the object.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Inventors: Robert MILLER, JR., Harris M. MORGENSTERN, Charles Eugene MARI, Christopher Lee WOOD, Alfred Francis FOSTER
  • Patent number: 11048618
    Abstract: Examples of techniques for environment modification for software application testing are described herein. An aspect includes, based on starting testing of an application under test using a test case in a testing environment and determining that modification of the testing environment is enabled, modifying the testing environment. Another aspect includes running the testing of the application under test using the test case in the modified testing environment. Another aspect includes, based on detection of an error during the testing of the application under test, determining whether the error was caused by the modified testing environment. Another aspect includes, based on determining that the error was caused by the modified testing environment, suppressing the error and continuing the testing of the application under test in the modified testing environment. Another aspect includes, based on determining that the error was not caused by the modified testing environment, percolating the error.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: June 29, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven Partlow, Joseph Griesemer, Robert Miller, Jr.
  • Patent number: 11048576
    Abstract: A computing system includes a processor in signal communication with a memory unit. A test case and recovery (TCR) system is configured to operate in a first mode to perform recovery and repair operations on the memory unit in response to detecting an error event and a second mode to perform test case analysis and verification of an operating system stored in the memory unit in response to being called by a test case.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: June 29, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harris Morgenstern, Robert Miller, Jr., Tracy Christie, Joseph Danieli
  • Publication number: 20200334094
    Abstract: A computing system includes a processor in signal communication with a memory unit. A test case and recovery (TCR) system is configured to operate in a first mode to perform recovery and repair operations on the memory unit in response to detecting an error event and a second mode to perform test case analysis and verification of an operating system stored in the memory unit in response to being called by a test case.
    Type: Application
    Filed: April 22, 2019
    Publication date: October 22, 2020
    Inventors: Harris Morgenstern, Robert Miller, JR., Tracy Christie, Joseph Danieli
  • Publication number: 20200293430
    Abstract: Examples of techniques for environment modification for software application testing are described herein. An aspect includes, based on starting testing of an application under test using a test case in a testing environment, determining whether modification of the testing environment is enabled. Another aspect includes, based on determining that modification of the testing environment is enabled, modifying the testing environment.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 17, 2020
    Inventors: Steven Partlow, Joseph Griesemer, Robert Miller, JR.
  • Patent number: 10372091
    Abstract: An energy dissipating article of manufacture is disclosed that is a high pressure enhanced structure technology comprising a structure having at least one wall forming a sealed inner chamber, and either (i) the sealed inner chamber is filled with a gas under pressure, or (ii) an inflated bladder filled with gas is located within the sealed inner chamber, or (iii) a deflated bladder that is located within the sealed inner chamber, and an inflation system that produces a gas to inflate the deflated bladder, or (iv) the sealed inner chamber at one atmosphere standard normal pressure, and an inflation system that produces a gas, to pressurize the inner chamber. A method of making the articles of manufacture and uses thereof are disclosed.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: August 6, 2019
    Inventor: Robert A. Miller, Jr.
  • Patent number: 10254962
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 10168960
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Harris M. Morgenstern, James H. Mulder, Elpida Tzortzatos, Dieter Wellerdiek
  • Patent number: 10108466
    Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Hom, Charles E. Mari, Robert Miller, Jr., Harris M. Morgenstern, Elpida Tzortzatos
  • Publication number: 20180275879
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Application
    Filed: May 31, 2018
    Publication date: September 27, 2018
    Inventors: Robert Miller, JR., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 10031694
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: July 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20180088868
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Application
    Filed: November 14, 2017
    Publication date: March 29, 2018
    Inventors: ROBERT MILLER, JR., HARRIS M. MORGENSTERN, JAMES H. MULDER, ELPIDA TZORTZATOS, DIETER WELLERDIEK
  • Patent number: 9898226
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: February 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Harris M. Morgenstern, James H. Mulder, Elpida Tzortzatos, Dieter Wellerdiek
  • Patent number: 9740605
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: August 22, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Harris M. Morgenstern, James H. Mulder, Elpida Tzortzatos, Dieter Wellerdiek
  • Patent number: 9690483
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: June 27, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20170123966
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Application
    Filed: August 26, 2016
    Publication date: May 4, 2017
    Inventors: ROBERT MILLER, JR., HARRIS M. MORGENSTERN, JAMES H. MULDER, ELPIDA TZORTZATOS, DIETER WELLERDIEK
  • Publication number: 20170123725
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 4, 2017
    Inventors: ROBERT MILLER, JR., HARRIS M. MORGENSTERN, JAMES H. MULDER, ELPIDA TZORTZATOS, DIETER WELLERDIEK
  • Publication number: 20170109051
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Application
    Filed: January 5, 2017
    Publication date: April 20, 2017
    Inventors: Robert Miller, JR., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos