Abstract: A modulation identification device can be used for detecting the modulation type of a wirelessly transmitted and modulated RF signal without a-priori information on the kind of modulation used. The modulation identification device (1) comprises a n-port junction (17), n being an integer equal to or larger than three. The n-port junction (17) is supplied with the modulated RF signal (2) and a second RF signal (3) from a local oscillator. The n-port junction (17) outputs at least one third RF signal to at least one power detector (18). A signal processing unit (6) processes the power detected output of the n-port junction (17) to generate at least one flag (10) indicating the identified modulation type.

Abstract: A transmitter, the method of the same, and a communication system using the scheme of space-time block coding employing the multiple beams to mitigate the multipath fading. A transmitter constituted array antennas first performs beams scanning employing beamforming network for estimating the channel space gain pattern, then estimates number of the beams for transmission and the corresponding angles of each beam, performs beam space-time block encoding of input signals then transmitting the encoded signals. The receiver receives the signal and performs linear channel decoding, for example, maximum likelihood decoding.

Abstract: A communication system for performing transmission and reception of a signal over a communication channel assesses a state of the communication channel and produces channel state information accordingly. A block length selector selects block lengths that are dependent on the channel state information and that are selected from a group of block lengths having an integral multiple relationship to produce a schedule of block lengths. Encoding and decoding is performed based on the schedule of block lengths.

Abstract: A modulation format identification device capable of realizing a practical receiver capable of identifying a modulation format of a received signal irrespective of its modulation format by a simple configuration, wherein provision is made of a phase lock detector group having a plurality of detectors provided corresponding to a plurality of modulation formats and with the received signals input in parallel thereto, counting a number of symbols in accordance with the modulation format for every detector, making a primary decision that the received signal has been modulated by the related modulation format when the count exceeds a constant threshold value, and outputting the results as lock detection flags and a logic circuit for exclusively selecting one modulation format upon receipt of the plurality of output results of the phase lock detector group, and a method of the same.

Abstract: A plurality of circuit cells, a plurality of matrix switch sections and a plurality of switch sections for connecting between the plurality of circuit cells, all of which form a part of a circuit cell array, and a plurality of input/output cell sections arranged around the circuit cell array all change their circuit configurations in accordance with a configuration data to be supplied. In some of these circuit blocks, at least a part of the circuit thereof is fixed at a predetermined circuit configuration, and a conversion of the configuration data based on proprietary information regarding the fixed circuit is performed at a supplier of the configuration data. Thus, a differential configuration data for portions of the circuit other than the fixed circuit portion is generated and supplied to the integrated circuit.

Abstract: A decoder for performing soft decision iterative decoding of a cyclic code based on belief propagation, includes an information exchange control unit, an X processor, and a Z processor. The information exchange control unit takes &pgr;x-metrics that were calculated by the X processor for nonzero elements in each of n-cyclic shifts of the parity-check polynomial of the code, and distributes the &pgr;x-metrics to the Z processor as the &pgr;z-metrics for a corresponding check node. The information exchange control unit takes &lgr;z-metrics that were calculated by the Z processor for nonzero elements in each of n-cyclic shifts in a reverse order of the parity-check polynomial, and distributes them to the X processor as &lgr;x-metrics for the corresponding code node. The operation of the information exchange control unit can be represented by the Tanner graph associated with an extended parity-check matrix, which is produced by adding k rows to the parity-check matrix of the cyclic code.

Abstract: A method and apparatus for multi-level encrypted encoding and decoding of digital signals, which includes utilizing only one type of encoder and one type of decoder. This can be either the same encoder and decoder used in throughout the process, or multiple, identical encoders and decoders. This allows the system to compensate for atmospheric degradation with higher bandwidth efficiency and a simplified receiver structure. The invention further identifies a 2j symbol generation technique that maps in disjoint regions of X-dimensional space, which allows different data bits to be eliminated from the decoding scheme and maximizes the number of independent data substreams that can be maintained.

Abstract: A plurality of circuit cells, a plurality of matrix switch sections and a plurality of switch sections for connecting between the plurality of circuit cells, all of which form a part of a circuit cell array, and a plurality of input/output cell sections arranged around the circuit cell array all change their circuit configurations in accordance with a configuration data to be supplied. In some of these circuit blocks, at least a part of the circuit thereof is fixed at a predetermined circuit configuration, and a conversion of the configuration data based on proprietary information regarding the fixed circuit is performed at a supplier of the configuration data. Thus, a differential configuration data for portions of the circuit other than the fixed circuit portion is generated and supplied to the integrated circuit.

Abstract: A transmitter, the method of the same, and a communication system using the scheme of space-time block coding employing the multiple beams to mitigate the multipath fading. A transmitter constituted array antennas first performs beams scanning employing beamforming network for estimating the channel space gain pattern, then estimates number of the beams for transmission and the corresponding angles of each beam, performs beam space-time block encoding of input signals then transmitting the encoded signals. The receiver receives the signal and performs linear channel decoding, for example, maximum likelihood decoding.

Abstract: A Reed-Solomon decoder capable of correcting two symbol errors in a codeword of a Reed-Solomon RS(128,122,7) code over a Galois field GF(128) is provided. In an exemplary embodiment, the Reed-Solomon decoder is suitable for use in cable modems with little or no loss in error performance over Reed-Solomon decoder correcting three errors in a codeword.

Abstract: A decoder for performing soft decision iterative decoding of a cyclic code based on belief propagation, includes an information exchange control unit, an X processor, and a Z processor. The information exchange control unit takes &pgr;x-metrics that were calculated by the X processor for nonzero elements in each of n-cyclic shifts of the parity-check polynomial of the code, and distributes the &pgr;x-metrics to the Z processor as the &pgr;z-metrics for a corresponding check node. The information exchange control unit takes &lgr;z-metrics that were calculated by the Z processor for nonzero elements in each of n-cyclic shifts in a reverse order of the parity-check polynomial, and distributes them to the X processor as &lgr;x-metrics for the corresponding code node.

Abstract: A communication system for performing transmission and reception of a signal over a communication channel assesses state of the communication channel, and produces channel state information accordingly. A block length selector selects block lengths that are dependent on the channel state information and that are selected from a group consisting of block lengths having an integral multiple relationship, to produce a schedule of block lengths. Encoding and decoding is performed based on the schedule of block lengths.

Abstract: A modulation identification device can be used for detecting the modulation type of a wirelessly transmitted and modulated RF signal without a-priori information on the kind of modulation used. The modulation identification device (1) comprises a n-port junction (17), n being an integer equal to or larger than three. The n-port junction (17) is supplied with the modulated RF signal (2) and a second RF signal (3) from a local oscillator. The n-port junction (17) outputs at least one third RF signal to at least one power detector (18). A signal processing unit (6) processes the power detected output of the n-port junction (17) to generate at least one flag (10) indicating the identified modulation type.

Abstract: The present invention includes a method and system for improving performance of a receiver at a low signal-to-noise ratio. According to a first aspect, an encoded signal is received. The encoded signal is decoded to recover information in the encoded signal. Next, a threshold is ascertained in response to the recovered information, the threshold indicating a maximum number of acceptable errors in the recovered information. It is determined if the errors in the recovered information are in excess of the ascertained threshold. Information is then extracted from the encoded signal without decoding. The extracted information is output when the errors in the recovered information are in excess of the ascertained threshold. In all other instances, the recovered information is output. According to a second aspect, recovered signal data is output, the recovered signal data being either the recovered information or the extracted information.

Abstract: The present invention performs decoding of trellis coded modulated data using a conventional decoder by splitting up the tasks of estimating the uncoded portion and estimating the coded portion into separate tasks. The task of estimating the coded portion is performed based on a transformation on the input symbols and by taking advantage of the symmetry of the constellation associated with the modulated data when referencing a lookup table. The lookup table may also be designed to be smaller than a straight forward implementation by taking advantage of the same symmetry of the constellation.The alteration of the data is then corrected for, resulting in a smaller constellation (Bi Phase Shift Key for 1 coded bit per symbol systems, Quadrature Phase Shift Key for 2 coded bits per symbol systems) mapping only the coded portion of the data. This allows a conventional Viterbi decoder to estimate the coded portion.

Abstract: The present invention is directed to the encoding and decoding of a digital signal. The encoding process results in a rate-1/n convolutional code derived from a rate-1/2 convolutional code. The process includes: selecting a base convolutional encoding rate of rate-1/l, where l is an integer; selecting an output encoding rate of 1/n, where n is an integer greater than 1; encoding an input digital signal into a convolutional code comprised of signals S(0) through S(l-1), the convolutional code having the rate 1/l convolutional code encoding rate; and providing a rate-1/n convolutional code, which is derived from the rate-1/l convolutional code, the rate-1/n convolutional code having N(i) copies of the rate-1/l signals S(i), where i is from 0 through 1-l and where the sum of N(i) is equal to n.

Abstract: The purpose of the present invention is to provide a method for choosing the coding schemes, mappings, and puncturing rates for a modulation/demodulation system which would allow the system to compensate for certain transformations of the code in a post-Viterbi step as opposed to pre-Viterbi. This would allow for faster and simpler decoding of a code.

Abstract: A method and apparatus for fast decoding of a Reed-Solomon codeword which includes storing the codeword in memory, finding syndromes of the codeword, using the syndromes to determine the number of errors in the codeword, which in turn are used to find an error locator polynomial for the codeword, which is a polynomial whose roots can be used to find the locations of the errors. This error locator polynomial is then be used to find the positions of the errors in the codeword. The positions of the errors in the codeword can be used along with the syndromes to determine the values of the errors in the codeword.