Patents by Inventor Robert Mortan

Robert Mortan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250273525
    Abstract: A semiconductor package may have a microelectronic component electrically coupled to a plurality of leads which extend to a perimeter of the semiconductor package. A mold compound, which is electrically insulating, contacts the plurality of leads and the microelectronic component. Mold Array Process (MAP) molded Quad Flat No-Lead (QFN) packaging may apply mold compound to multiple microelectronic components simultaneously. After molding, the packages are cured and singulated. A mold compound middle mold chase with a mold cavity for each package and a mold compound injection port associated with each semiconductor package to distribute the mold compound may decreases micro voiding of the mold compound, raise the coefficient of thermal expansion, and improve board level reliability. Semiconductor packages formed with a mold compound injection port corresponding to each package may have a gate cull on the exterior of the semiconductor package where the mold compound enters the mold cavity.
    Type: Application
    Filed: February 28, 2024
    Publication date: August 28, 2025
    Inventors: Ruben Rolda, Robert Mortan
  • Publication number: 20050148111
    Abstract: A method includes mounting an electronic component to a circuit board. Solder paste is applied to a board pad of the circuit board and a terminal pad of an electrical component is aligned with the board pad. The terminal includes a pad feature and a pad base. The solder paste is liquefied to cause the solder paste to flow along the pad feature. Then the solder paste is cooled to form a solder joint. The solder joint bonds the board pad and the pad base and forms a connection between the circuit board and the electrical component. Because this solder joint is subject to reduced stress at interface junctures of the solder joint, the solder joint is more resilient than conventional solder joints.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 7, 2005
    Inventor: Robert Mortan
  • Publication number: 20050133906
    Abstract: A thermally enhanced BGA semiconductor device 10 having a heat sink 12 formed from a single piece of material with an expanded base and a pedestal in contact with a semiconductor chip 11. The pedestal is aligned through a window opening in a substrate 13 and the top surface of the base is adhered to the substrate. The heat sink 12 with an expanded base provides a path for rapid and efficient heat spreading and dissipation, a stand-off and an aid to improved package planarity during reflow to a PCB, and a long path for ingress of contaminants into the package. The device is amenable to high volume, low cost production.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: Joe Woodall, Robert Mortan