Abstract: A method of synchronizing and reconfiguring configurable elements in a programmable unit is provided. A unit has a two or multi-dimensional programmable cell architecture (e.g., DFP, DPGA, etc.), and any configurable element can have access to a configuration register and a status register of the other configurable elements via an interconnection architecture and can thus have an active influence on their function and operation. By making synchronization the responsibility of each element, more synchronization tasks can be performed at the same time because independent elements no longer interfere with each other in accessing a central synchronization instance.

Abstract: A method of automatic address generation by units within clusters of a plurality of such units in which individual configurable elements of a unit can be addressed. It is thus possible to address the individual elements directly for reconfiguration. This is a prerequisite for being able to reconfigure parts of the unit by an external primary logic unit without having to change the entire configuration of the unit. In addition, the addresses for the individual elements of the units are automatically generated in the X and Y directions, so that the addressing scheme represents the actual arrangement of units and configurable elements. Furthermore, manual allocation of addresses is not necessary due to automatic address generation.

Abstract: A method of run-time reconfiguration of a programmable unit is provided, the programmable unit including a plurality of reconfigurable function cells in a multidimensional arrangement. An event is detected. The source of the detected event is determined, and an address of an entry in a jump table is calculated as a function of the source of the event, the entry storing a memory address of a configuration for a reconfigurable function cell. The entry is retrieved and a state of a corresponding reconfigurable cell is determined. If the reconfigurable cell is in a reconfiguration state, the reconfigurable cell is reconfigured as a function of the configuration data. If the reconfigurable cell is not in a reconfiguration state, the configuration data is stored in a FIFO.

Abstract: A technique of coating an electronic component with a resin. A semiconductor chip is placed on an insulating film carrying electric contacts to which the semiconductor chip is connected by connection wires passing through holes formed in the insulating film. The holes in the insulating film are placed around a zone for receiving the semiconductor chip, and the semiconductor chip is placed on the insulating film in such zone. The connection wires are connected between the semiconductor chip and the electric contacts, and a drop of resin is deposited on the semiconductor chip and on the connection wires. This drop forms an outline defined solely by the holes due to surface tension applied by the resin retained in the holes. This arrangement is applicable to electronic modules for memory cards.