Patents by Inventor Robert Murto

Robert Murto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060019437
    Abstract: The present invention provides a method of manufacturing a semiconductor device. The semiconductor device (100), among other possible elements, includes a first transistor (120) located over a semiconductor substrate (110), wherein the first transistor (120) has a gate electrode (135) that includes a metal silicide layer 135a over which is located a silicon gate layer (135b) together which have a work function associated therewith, and a second transistor (125) located over the semiconductor substrate (110) and proximate the first transistor (120), wherein the second transistor (125) also includes a gate electrode (160) that includes a metal silicide layer (160a) over which is located a silicon gate layer (160b) together which have a different work function from that of the first gate electrode (135) associated therewith.
    Type: Application
    Filed: July 23, 2004
    Publication date: January 26, 2006
    Applicant: Texas Instruments, Incorporated
    Inventors: Robert Murto, Luigi Colombo, Mark Visokay
  • Publication number: 20050136605
    Abstract: Methods are presented for fabricating transistor gate structures, wherein upper and lower metal suicides are formed above a gate dielectric. In one example, the lower silicide is formed by depositing a thin first silicon-containing material over the gate dielectric, which is implanted and then reacted with a first metal by annealing to form the lower silicide. A capping layer can be formed over the first metal prior to annealing, to prevent oxidation of the metal prior to silicidation, and a barrier layer can be formed over the lower silicide to prevent reaction with subsequently formed silicon material. In another example, the lower silicide is a multilayer silicide structure including a plurality of metal silicide sublayers.
    Type: Application
    Filed: December 22, 2003
    Publication date: June 23, 2005
    Inventors: Robert Murto, Luigi Colombo, Mark Visokay