Patents by Inventor Robert N. Bielby

Robert N. Bielby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6263400
    Abstract: A programmable logic device having content addressable memory is disclosed. In a preferred embodiment, the programmable logic device includes reconfigurable dual mode memory suitable for operating as a content addressable memory in a first mode and a random access memory in a second mode is disclosed. Mode control switch circuitry may be provided to selectively enable a user to configure the dual mode memory as either content addressable memory or random access memory.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: July 17, 2001
    Assignee: Altera Corporation
    Inventors: Krishna Rangasayee, Robert N. Bielby
  • Patent number: 6060903
    Abstract: A programmable logic device architecture incorporating a cross-bar switch is disclosed. In a preferred embodiment, a plurality of logic cells is programmably interconnected to form an array of logic cells capable of implementing complex logic functions. A user selectable cross-bar switch block having dedicated programmable connectors is coupled to the array of logic cells by way of a mode control circuit switch. The mode control circuit switch is arranged to couple the dedicated cross-bar switch block to the array of logic cells in a first mode and to de-couple the cross-bar switch block from the array of logic blocks in a second mode.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: May 9, 2000
    Assignee: Altera Corporation
    Inventors: Krishna Rangasayee, Robert N. Bielby
  • Patent number: 6058452
    Abstract: A programmable logic device having content addressable memory is disclosed. In a preferred embodiment, the programmable logic device includes reconfigurable dual mode memory suitable for operating as a content addressable memory in a first mode and a random access memory in a second mode is disclosed. Mode control switch circuitry may be provided to selectively enable a user to configure the dual mode memory as either content addressable memory or random access memory.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: May 2, 2000
    Assignee: Altera Corporation
    Inventors: Krishna Rangasayee, Robert N. Bielby
  • Patent number: 5940852
    Abstract: A programmable logic device having content addressable memory is disclosed. In a preferred embodiment, the programmable logic device includes reconfigurable dual mode memory suitable for operating as a content addressable memory in a first mode and a random access memory in a second mode is disclosed. Mode control switch circuitry may be provided to selectively enable a user to configure the dual mode memory as either content addressable memory or random access memory.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: August 17, 1999
    Assignee: Altera Corporation
    Inventors: Krishna Rangasayee, Robert N. Bielby