Abstract: Serial data from a C-MAC, D-MAC or D2-MAC television signal is applied over line (1) to a serial data to error conversion unit (2) which produces a 3-bit error signal when the applied data is compared with a W1 sync. word. The error signal is applied to comparators (6 and 7) whose other inputs receive a maximum or minimum error dependent signal to produce an output when the number of errors lies within certain requirements. These outputs are latched in a 2-bit latch (8) to produce line pulses on receipt of an acceptable sync. word at an appropriate time, the outputs of the latch (8) being applied to two shift registers (9 and 10).