Patents by Inventor Robert Neil McKenzie
Robert Neil McKenzie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220139455Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.Type: ApplicationFiled: January 11, 2022Publication date: May 5, 2022Applicant: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Publication number: 20210272629Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.Type: ApplicationFiled: April 28, 2021Publication date: September 2, 2021Applicant: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Patent number: 11037625Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.Type: GrantFiled: January 23, 2019Date of Patent: June 15, 2021Assignee: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Publication number: 20210020245Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.Type: ApplicationFiled: October 5, 2020Publication date: January 21, 2021Applicant: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Patent number: 10796762Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.Type: GrantFiled: February 26, 2018Date of Patent: October 6, 2020Assignee: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Patent number: 10790790Abstract: An audio amplifier system includes a delta-sigma modulator configured to receive an m-bit digital audio input signal and to generate a pulse density modulated signal based on the m-bit digital audio input signal. An analog power stage is coupled to the delta-sigma modulator to receive the pulse density modulated signal and amplify the pulse density modulated signal to generate an amplified pulse density modulated signal. A feedback circuit is coupled to the delta-sigma modulator and the analog power stage. The feedback circuit is configured to receive the amplified pulse density modulated signal and the pulse density modulated signal and to determine a digital error signal representative of a difference between the amplified pulse density modulated signal and the pulse density modulated signal. The feedback circuit is further configured to provide the digital error signal to the delta-sigma modulator for applying the digital error signal to a representation of the m-bit digital audio input signal.Type: GrantFiled: January 17, 2018Date of Patent: September 29, 2020Assignee: KAPIK INC.Inventors: Robert Neil McKenzie, William Martin Snelgrove, Wai Tung Ng
-
Publication number: 20190172537Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.Type: ApplicationFiled: January 23, 2019Publication date: June 6, 2019Applicant: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Publication number: 20180205352Abstract: An audio amplifier system includes a delta-sigma modulator configured to receive an m-bit digital audio input signal and to generate a pulse density modulated signal based on the m-bit digital audio input signal. An analog power stage is coupled to the delta-sigma modulator to receive the pulse density modulated signal and amplify the pulse density modulated signal to generate an amplified pulse density modulated signal. A feedback circuit is coupled to the delta-sigma modulator and the analog power stage. The feedback circuit is configured to receive the amplified pulse density modulated signal and the pulse density modulated signal and to determine a digital error signal representative of a difference between the amplified pulse density modulated signal and the pulse density modulated signal. The feedback circuit is further configured to provide the digital error signal to the delta-sigma modulator for applying the digital error signal to a representation of the m-bit digital audio input signal.Type: ApplicationFiled: January 17, 2018Publication date: July 19, 2018Inventors: Robert Neil McKENZIE, William Martin SNELGROVE, Wai Tung NG
-
Publication number: 20180182459Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.Type: ApplicationFiled: February 26, 2018Publication date: June 28, 2018Applicant: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Patent number: 9941007Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.Type: GrantFiled: October 17, 2014Date of Patent: April 10, 2018Assignee: Thstyme Bermuda LimitedInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
-
Publication number: 20150046625Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.Type: ApplicationFiled: October 17, 2014Publication date: February 12, 2015Applicant: THSTYME BERMUDA LIMITEDInventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove