Patents by Inventor Robert Neill Newshutz

Robert Neill Newshutz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6567962
    Abstract: An apparatus performs a process for partitioning a netlist. The process picks a unique color for each clock and traverses the clock tree coloring the latches in support of that clock tree with that color. The process then colors the fanout logic cones for each latch and notes any coloring collisions. In the case of a multicolored gate, the process retimes the network by moving the terminating latch backwards, towards the collision, to enable single coloring of the gate. The process then performs a depth-first search on the fanout logic of each primary input to the first latch encountered or a primary output. If a primary output is encountered, the path is colored with a color representing the free-run domain. Otherwise, the process colors the path with the color of the terminating latch. Next, the process duplicates the fanin cones for remaining multicolored gates so that a copy of the logic can be incorporated with each independent domain.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: May 20, 2003
    Assignee: International Business Machines Corporation
    Inventors: Jason Raymond Baumgartner, Robert Neill Newshutz, Steven Leonard Roberts, Anson Jeffrey Tripp
  • Patent number: 6556936
    Abstract: A method and apparatus are provided for correlating trace data from asynchronous machines, such as asynchronous emulation machines. A data capture signal is received from each of the plurality of asynchronous machines. The data capture signal from each of the plurality of asynchronous machines is sampled. Then the sampled data capture signal from each of the plurality of asynchronous machines and a cycle count are stored. A trace synchronization system is coupled to each of the plurality of asynchronous machines for receiving the data capture signal from each of the plurality of asynchronous machines. The trace synchronization system operates no slower than the data capture signal from each of the plurality of asynchronous machines, so that no data capture signals are missed.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: April 29, 2003
    Assignee: International Business Machines Corporation
    Inventors: Thomas Michael Gooding, Roy Glenn Musselman, Robert Neill Newshutz, Jeffery Joseph Ruedinger
  • Publication number: 20020120413
    Abstract: A method and apparatus are provided for correlating trace data from asynchronous machines, such as asynchronous emulation machines. A data capture signal is received from each of the plurality of asynchronous machines. The data capture signal from each of the plurality of asynchronous machines is sampled. Then the sampled data capture signal from each of the plurality of asynchronous machines and a cycle count are stored. A trace synchronization system is coupled to each of the plurality of asynchronous machines for receiving the data capture signal from each of the plurality of asynchronous machines. The trace synchronization system operates no slower than the data capture signal from each of the plurality of asynchronous machines, so that no data capture signals are missed. The trace synchronization system includes a trace synchronization array for storing the sampled data capture signal from each of the plurality of asynchronous machines and a cycle count.
    Type: Application
    Filed: December 27, 2000
    Publication date: August 29, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Michael Gooding, Roy Glenn Musselman, Robert Neill Newshutz, Jeffery Joseph Ruedinger
  • Publication number: 20020066065
    Abstract: An apparatus performs a process for partitioning a netlist. The process picks a unique color for each clock and traverses the clock tree coloring the latches in support of that clock tree with that color. The process then colors the fanout logic cones for each latch and notes any coloring collisions. In the case of a multicolored gate, the process retimes the network by moving the terminating latch backwards, towards the collision, to enable single coloring of the gate. The process then performs a depth-first search on the fanout logic of each primary input to the first latch encountered or a primary output. If a primary output is encountered, the path is colored with a color representing the free-run domain. Otherwise, the process colors the path with the color of the terminating latch. Next, the process duplicates the fanin cones for remaining multicolored gates so that a copy of the logic can be incorporated with each independent domain.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 30, 2002
    Inventors: Jason Raymond Baumgartner, Robert Neill Newshutz, Steven Leonard Roberts, Anson Jeffrey Tripp
  • Patent number: 6321376
    Abstract: An apparatus and method for semi-automated generation and application of language conformity tests is disclosed. Generation is based on interpretative or compiled processing of a generator-oriented, formal language specification embodying lexical, syntactic and semantics aspects of a language standard as well as specific test strategies. Such test strategies control the order and extent of the test sequence generated and applied. Both test case generation and application of test cases may occur in parallel.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: November 20, 2001
    Assignee: FTL Systems, Inc.
    Inventors: John Christopher Willis, Robert Neill Newshutz, Philip Arthur Wilsey
  • Patent number: 5999734
    Abstract: A distributed, compiler-oriented database is disclosed with operating modes including parallel compilation, parallel simulation and parallel execution of computer programs and hardware models. The invention utilizes a hardware apparatus consisting of shared memory multiprocessors, optionally augmented by processors with re-configurable logic execution pipelines or independently scheduled re-configurable logic blocks and a software database apparatus, manifest in the hardware apparatus, in order to efficiently support parallel database clients such as a source code analyzer, an elaborator, an optimizer, mapping and scheduling, code generation, linking/loading, execution/simulation, debugging, profiling, user interface and a file interface.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: December 7, 1999
    Assignee: FTL Systems, Inc.
    Inventors: John Christopher Willis, Robert Neill Newshutz