Abstract: A circuit for programming a fuse is disclosed. The circuit includes a voltage supply terminal (Vf) and a semiconductor controlled rectifier (222, 224). The fuse is coupled between the voltage supply terminal and the semiconductor controlled rectifier. A switching circuit (200, 202, 208, 210) is coupled to the semiconductor controlled rectifier.

Abstract: Systems and a method for routing optical signals are disclosed. One system includes a first large core hollow metal waveguide configured to guide a substantially coherent optical beam. A second large core hollow waveguide is optically coupled to the first waveguide with a coupling device. The coupling device is configured to divide the coherent optical beam into a transmitted beam and a reflected beam. Beam walk-off within the coupling device causes the transmitted beam to be shifted by an offset amount. The second large core hollow metal waveguide is shifted from the first large core hollow metal waveguide by approximately the offset amount to receive the shifted transmitted beam.

Abstract: A method of operating a memory circuit compatible with dynamic random access memories (DRAM) and static random access memories (SRAM) is disclosed. The method includes selecting a word line (708) connected to a row of memory cells in response to a plurality of row address signals and selecting a plurality of columns (706,710) of memory cells in response to a plurality of column address signals. A first part (714) of the plurality of columns is selected in response to a first voltage applied to the selected word line. A second part (716) of the plurality of columns is selected in response to a second voltage applied to the selected word line.

Abstract: This disclosure describes, generally, methods and systems for generating electronic invoices. The method may include logging on to an online invoicing service account, and looking up a customer account from multiple customers associated with the online invoicing service account. The method may further include selecting the customer account that has a pending financial transaction with a biller. A request for an electronic invoice to be generated for the selected customer is initiated and the electronic invoice may be transmitted to the selected customer.

Abstract: An optical splitter device and method are provided. The device can include a waveguide having walls forming a large hollow core. The waveguide can be configured to direct an optical signal through the large hollow core. An optical tap can be formed through at least one wall of the waveguide. In addition, a prism can be located in the large hollow core of the waveguide and aligned with the optical tap. A splitter coating can be provided on the prism to direct a portion of the optical signal outside of the waveguide through the optical tap.

Abstract: A micro electromechanical systems (MEMS) sensor is excited. The response of the MEMS sensor is measured. The MEMS sensor is calibrated.

Abstract: A circuit compatible with dynamic random access memories (DRAM) and static random access memories (SRAM) is disclosed. The circuit includes a substrate having a first conductivity type. A trench isolation region (850,852) is formed in the substrate. The trench isolation region has sides and a bottom formed below a face of the substrate. A first semiconductor region having a second conductivity type (868) is formed at the bottom of the trench isolation region. A second semiconductor region having the second conductivity type (870) is formed separately from the first semiconductor region adjacent a first side of trench isolation region and in conductive contact with the first semiconductor region.

Abstract: A circuit for programming a fuse is disclosed. The circuit includes a voltage supply terminal (Vf) and a semiconductor controlled rectifier (222, 224). The fuse is coupled between the voltage supply terminal and the semiconductor controlled rectifier. A switching circuit (200, 202, 208, 210) is coupled to the semiconductor controlled rectifier.

Abstract: A circuit for programming a fuse is disclosed. The circuit includes a voltage supply terminal (Vp) and a latch circuit comprising a p-channel transistor and an n-channel transistor (208-214). A semiconductor controlled rectifier (206) in the circuit includes at least one terminal of the p-channel transistor. A fuse (200) is coupled between the voltage supply terminal and the semiconductor controlled rectifier. The fuse is programmed in response to the semiconductor controlled rectifier.

Abstract: A system for making financial transfers between subscribers of a financial transfer service is disclosed. The system may include a receiving subscriber interface (RSI), a sending subscriber interface (SSI), and an agent server (AS). The RSI may be configured to accept a set of invoice information including an identifier of a destination account. The SSI may be configured to accept a set of payment information including an identifier of a source account. The AS may be configured to receive the set of invoice information and create an invoice based on the set of invoice information. The AS may also be configured to transmit the invoice and receive the set of payment information. The AS may also be configured to cause an amount of funds to be transferred from the source account on a source transfer network to the destination account on a destination transfer network via a primary transfer network.

Abstract: A power tool an electric motor retained within a housing. A rechargeable battery is retained within the housing that is operatively connected to the electric motor. A power input port is supported within the housing that is operatively connected to the rechargeable battery. The power input port is configured to supply power to the rechargeable battery from an external power source. The rechargeable battery comprises a lithium based battery, and the power input port comprises a universal serial bus (USB) port configured to receive a USB connector.

Abstract: A method of operating a memory circuit compatible with dynamic random access memories (DRAM) and static random access memories (SRAM) is disclosed. The method includes selecting a word line (708) connected to a row of memory cells in response to a plurality of row address signals and selecting a plurality of columns (706,710) of memory cells in response to a plurality of column address signals. A first part (714) of the plurality of columns is selected in response to a first voltage applied to the selected word line. A second part (716) of the plurality of columns is selected in response to a second voltage applied to the selected word line.

Abstract: A circuit compatible with dynamic random access memories (DRAM) and static random access memories (SRAM) is disclosed. The circuit includes a substrate having a first conductivity type. A trench isolation region (850,852) is formed in the substrate. The trench isolation region has sides and a bottom formed below a face of the substrate. A first semiconductor region having a second conductivity type (868) is formed at the bottom of the trench isolation region. A second semiconductor region having the second conductivity type (870) is formed separately from the first semiconductor region adjacent a first side of trench isolation region and in conductive contact with the first semiconductor region.

Abstract: A circuit for programming a fuse is disclosed. The circuit includes a voltage supply terminal (Vp) and a latch circuit comprising a p-channel transistor and an n-channel transistor (208-214). A semiconductor controlled rectifier (206) in the circuit includes at least one terminal of the p-channel transistor. A fuse (200) is coupled between the voltage supply terminal and the semiconductor controlled rectifier. The fuse is programmed in response to the semiconductor controlled rectifier.

Abstract: A method of protecting a power supply voltage in an integrated circuit is disclosed. The method includes storing charge in a charge reservoir capacitor (142), receiving a power supply sample voltage (140), and receiving a load power supply voltage (VDDL, 102). The power supply sample voltage is compared to the load power supply voltage (150). Charge is added from the charge reservoir capacitor (142) to the load power supply (VDDL) through transistor 126 and capacitor 144 in response to the step of comparing.

Abstract: An optical interconnect includes a set of splitters. Each splitter includes a source waveguide, a reflection waveguide, an output waveguide, and a partially reflective mirror element with a reflective coating. The source waveguide and the reflection waveguide are optically coupled to the partially reflective element. A photonic signal from the source waveguide is partially reflected off the reflective coating as a reflected signal into the reflection waveguide. The output waveguide is optically coupled to the opposite surface and configured such that a non-reflected portion of the photonic signal propagates into the output waveguide. The reflective coating includes a reflected surface area interfacing with the photonic signal form the source waveguide, and power of the non-reflected portion is a function of the reflective surface area interfacing with source waveguide.

Abstract: A system for making financial transfers between subscribers of a financial transfer service is disclosed. The system may include a receiving subscriber interface (RSI), a sending subscriber interface (SSI), and an agent server (AS). The RSI may be configured to accept a set of invoice information including an identifier of a destination account. The SSI may be configured to accept a set of payment information including an identifier of a source account. The AS may be configured to receive the set of invoice information and create an invoice based on the set of invoice information. The AS may also be configured to transmit the invoice and receive the set of payment information. The AS may also be configured to cause an amount of funds to be transferred from the source account on a source transfer network to the destination account on a destination transfer network via a primary transfer network.

Abstract: An electrostatic discharge (ESD) protection circuit is disclosed. The circuit includes a first terminal (200), a first power supply terminal (Vdd), and a second power supply terminal (Vss). The circuit further includes a junction field effect transistor (JFET) having a current path coupled between the first terminal and the second power supply terminal. The JFET has a control terminal (202) coupled to the first power supply terminal.

Abstract: A programmable semiconductor controlled rectifier (SCR) circuit is disclosed. The SCR includes a first terminal (310) and a second terminal (308). A first lightly doped region (304) having a first conductivity type (N?) is formed on a second lightly doped region (314) having a second conductivity type (P?). A first heavily doped region having the second conductivity type (P+ ) is formed within the first lightly doped region at a face of the substrate and coupled to the first terminal. A second heavily doped region having the first conductivity type (N+ ) is formed within the second lightly doped region at the face of the substrate and coupled to the second terminal. A third heavily doped region (400) having the second conductivity type (P+ ) is formed at least partially within the first lightly doped region at the face of the substrate between the first and second heavily doped regions and electrically connected to the second lightly doped region.

Abstract: A circuit for programming a fuse is disclosed. The circuit includes a voltage supply terminal (Vf) and a semiconductor controlled rectifier (222, 224). The fuse is coupled between the voltage supply terminal and the semiconductor controlled rectifier. A switching circuit (200, 202, 208, 210) is coupled to the semiconductor controlled rectifier.