Abstract: The present invention is directed towards increasing the conductivity of the electrical lead material in the read head portion of a magnetic head, such that thinner electrical leads can be fabricated while the current carrying capacity of the leads is maintained. This increase in electrical lead conductivity is accomplished by fabricating the electrical lead upon an epitaxially matched seed layer, such that the crystalline microstructure of the electrical lead material has fewer grain boundaries, whereby the electrical conductivity of the lead material is increased. In a preferred embodiment, the electrical lead material is comprised of Rh, which has an FCC crystal structure, and the seed layer is comprised of a metal, or metal alloy having a BCC crystal structure with unit cell lattice constant dimensions that satisfy the relationship that abcc is approximately equal to 0.816afcc. In various embodiments, the seed layer is comprised of VMo or VW.

Abstract: The invention is a laminated antiferromagnetically coupled (AFC) structure for use in a spin valve (SV) sensor or magnetic tunnel junction (MTJ) device, having two ferromagnetic films coupled together with an improved AFC film. Particularly the AFC film comprises an alloy material selected from the group consisting of Ru100-xmx, Os100-ymy, Ir100-ymy, Rh100-y,my, Re100-zmz, and M100-xmx, where M is an alloy of two or more materials selected from the group consisting of Ru, Os, Ir, Rh, and Re, and where m is a material selected from the group consisting of W, Ta, Mo, Nb and alloys of two or more materials selected from W, Ta, Mo, and Nb, and where x is between approximately 5 and 95 at. %, y is between approximately 10 and 90 at. %, and z is between approximately 25 and 75 at. %. The sensors may be used in magnetic heads of hard disk drives.

Abstract: The present invention is directed towards increasing the conductivity of the electrical lead material in the read head portion of a magnetic head, such that thinner electrical leads can be fabricated while the current carrying capacity of the leads is maintained. This increase in electrical lead conductivity is accomplished by fabricating the electrical lead upon an epitaxially matched seed layer, such that the crystalline microstructure of the electrical lead material has fewer grain boundaries, whereby the electrical conductivity of the lead material is increased. In a preferred embodiment, the electrical lead material is comprised of Rh, which has an FCC crystal structure, and the seed layer is comprised of a metal, or metal alloy having a BCC crystal structure with unit cell lattice constant dimensions that satisfy the relationship that abcc is approximately equal to 0.816afcc. In various embodiments, the seed layer is comprised of VMo or VW.

Abstract: The present invention is directed towards increasing the conductivity of the electrical lead material in the read head portion of a magnetic head, such that thinner electrical leads can be fabricated while the current carrying capacity of the leads is maintained. This increase in electrical lead conductivity is accomplished by fabricating the electrical lead upon an epitaxially matched seed layer, such that the crystalline microstructure of the electrical lead material has fewer grain boundaries, whereby the electrical conductivity of the lead material is increased. In a preferred embodiment, the electrical lead material is comprised of Rh, which has an FCC crystal structure, and the seed layer is comprised of a metal, or metal alloy having a BCC crystal structure with unit cell lattice constant dimensions that satisfy the relationship that abcc is approximately equal to 0.816afcc. In various embodiments, the seed layer is comprised of VMo or VW.

Abstract: The invention is a laminated antiferromagnetically coupled (AFC) structure for use in a spin valve (SV) sensor or magnetic tunnel junction (MTJ) device, having two ferromagnetic films coupled together with an improved AFC film. Particularly the AFC film comprises an alloy material selected from the group consisting of Ru100-x, Os100-ymy, Ir100-ymy, Rh100-y,my, Re100-zmz, and M100-xmx, where M is an alloy of two or more materials selected from the group consisting of Ru, Os, Ir, Rh, and Re, and where m is a material selected from the group consisting of W, Ta, Mo, Nb and alloys of two or more materials selected from W, Ta, Mo, and Nb, and where x is between approximately 5 and 95 at. %, y is between approximately 10 and 90 at. %, and z is between approximately 25 and 75 at. %. The sensors may be used in magnetic heads of hard disk drives.

Abstract: A read track width defining layer is employed for defining first and second side edges of a read sensor. The read track width defining layer preferably remains in the head to planarize the read head at first and second hard bias and lead layers so as to overcome a problem of write gap curvature in an accompanying write head. The read track width defining layer is defined by a subtractive process about a bilayer photoresist layer. The subtractive process is selective to the read track width defining layer over a read sensor material layer therebelow. Ion milling is then employed for defining first and second side edges of a read sensor layer employing the read track width defining layer as a mask. First and second hard bias and lead layers are then deposited which make contiguous junctions with the first and second side edges of each of the read sensor and read track width defining layers. The photoresist is then removed and the remainder of the read head is completed.

Abstract: A method of making a magnetic head that has a read head with a track width includes the steps of depositing a read track width defining material layer on a read sensor material layer; forming a bi-layer photoresist mask on the read track width defining material layer that masks a read track width defining layer portion of the read track width defining material layer; removing by reactive ion etching (RIE) a portion of the read track width defining material layer not masked by the photoresist mask to form the read track width defining layer portion with exposed first and second side edges that are spaced apart a distance equal to the track width; removing by ion milling a first portion of the read sensor material layer not masked by the read track width defining layer portion to form a second portion of the read sensor material layer with exposed first and second side edges that have a width equal to the track width; depositing hard bias and lead material layers on the photoresist mask in contact with the firs

Abstract: A read track width defining layer is employed for defining first and second side edges of a read sensor. The read track width defining layer preferably remains in the head to planarize the read head at first and second hard bias and lead layers so as to overcome a problem of write gap curvature in an accompanying write head. The read track width defining layer is defined by a subtractive process about a bilayer photoresist layer. The subtractive process is selective to the read track width defining layer over a read sensor material layer therebelow. Ion milling is then employed for defining first and second side edges of a read sensor layer employing the read track width defining layer as a mask. First and second hard bias and lead layers are then deposited which make contiguous junctions with the first and second side edges of each of the read sensor and read track width defining layers. The photoresist is then removed and the remainder of the read head is completed.

Abstract: In this process of producing a bipolar transistor, all the regions of the device except the emitter region are formed by ion implantation through an inorganic dielectric layer of uniform thickness. Subsequently, all the contact openings to the emitter, base and collector are formed and the emitter is implanted through the emitter contact opening. This unique combination of process steps permits the use of a surface insulating dielectric layer of uniform thickness, wherein all capacitances are uniform and controllable while still permitting direct implantation of the emitter, which, because of its shallow depth is difficult to implant through an oxide.

Abstract: A method of ion implantation is provided which is particularly applicable to the fabrication of integrated circuits with high current ion implantation apparatus utilizing ion beams having currents of at least 0.5 ma. The method avoids excessive charge buildup on semiconductor wafer surfaces which may destroy the surface electrical insulation, thereby rendering the integrated circuit ineffective. The method involves forming in a layer of electrically insulative material over the wafer, a plurality of openings through the insulative layer in the various chip areas to expose the semiconductor wafer surfaces which are to be ion implanted with conductivity-determining impurities, and in addition, forming openings through the insulative layer over the kerf area between wafer chips to expose wafer kerf adjacent to the chip openings. The total area exposed in the wafer kerf must be greater than the total area exposed in said chip wafer openings.