Abstract: Apparatus for Scanning Acoustic Microscopy (SAM) of a semiconductor device including a substrate with an acoustic probe, The substrate has upper and lower surfaces. A sealed lower space provides an environment surrounding the lower surface. An upper ring structure formed above the upper surface includes an upper sealing ring in contact with the upper surface, with the upper sealing structure and the seal forming a dam for retaining the acoustic transmission fluid above the upper surface. A fixture base retains a lower sealing ring in contact with the lower surface surrounding the lower surface. An acoustic scanning probe positioned confronting the upper surface of the semiconductor device extending into the acoustic transmission fluid retained in contact with the upper surface.

Abstract: Apparatus for Scanning Acoustic Microscopy (SAM) of a semiconductor device including a substrate with an acoustic probe, The substrate has upper and lower surfaces. A sealed lower space provides an environment surrounding the lower surface. An upper ring structure formed above the upper surface includes an upper sealing ring in contact with the upper surface, with the upper sealing structure and the seal forming a dam for retaining the acoustic transmission fluid above the upper surface. A fixture base retains a lower sealing ring in contact with the lower surface surrounding the lower surface. An acoustic scanning probe positioned confronting the upper surface of the semiconductor device extending into the acoustic transmission fluid retained in contact with the upper surface.

Abstract: An in-situ wear indicator for detecting wear to at least one selected part in a semiconductor manufacturing environment. The indicator is manufactured in a selected material with a selected thickness so that the indicator degrades upon exposure to the semiconductor manufacturing process at a fixed rate relative to the wear of the selected part. The indicator displays a visual indication of wear which is discernible by an automated detection device.

Abstract: A semiconductor arrangement having a first active region and a dummy region on a surface of a substrate. The first active region and the dummy region are spaced from one another without any contact, and the dummy region is closer to an edge of the surface of the substrate in comparison to the first active region. Formed on the dummy region, first active region, and a portion of the substrate surface is a dielectric layer. The surface of the dielectric layer has an inactive portion and an active portion. A mask is disposed on the dielectric layer such that the mask contacts the inactive portion and does not contact the active portion.

Abstract: This invention relates generally to a belt type furnace. More specifically, this invention relates to a belt type furnace that sequentially stops the belt at the vicinity of at least one cooling unit, and where the cooling unit comprises at least two cooling elements. The furnace also allows the cooling of parts in such a way that the part cools uniformly.