Abstract: An error detection and correction apparatus and method in a memory system for performing single symbol error correction and at least double symbol error detection of data errors and single symbol error detection and at least double symbol error detection of addressing errors using a modified Reed Solomon code. A first of three parity symbols in a codeword is used to determine the value of a single symbol error, if any, over a memory word comprising data symbols and its corresponding address comprising address symbols. A second parity symbol is used to locate a single symbol error, and a third parity symbol is used to detect at least two errors in the data and address symbols. The three parity symbols are used to generate syndromes which determine if there is an error and what corrective action to take.