Patents by Inventor Robert P. Wierzbicki

Robert P. Wierzbicki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10367303
    Abstract: Example embodiments of the present invention relate to an apparatus comprising a zip-locker receiver. The zip-locker receiver is configured to ratchetably receive a zip-locker and comprises an aperture and a pawl disposed within the aperture configured to complement and cooperate with the ratchet teeth of the zip-locker to prevent removal of the zip-locker from the aperture of the zip-locker receiver at times the pawl of the zip-locker receiver is engaged with the ratchet teeth of the zip-locker.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: July 30, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Sean P. O'Donnell, David Boudreau, Albert F. Beinor, Jr., C. Ilhan Gundogan, Ralph C. Frangioso, Jr., Robert P. Wierzbicki
  • Patent number: 10114428
    Abstract: An IT device includes a system board and a hybrid connector system including a standard connector portion and a supplemental connector portion. The standard connector portion is configured to receive a standardized expansion card and a combination of the standard connector portion and the supplemental connector portion is configured to receive a riser card.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: October 30, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael Gregoire, Robert P. Wierzbicki
  • Patent number: 9854690
    Abstract: A rack unit for providing a server to be mounted within a storage rack is provided. The rack unit includes a set of low-profile drawer slides configured for mounting the rack unit within the storage rack, the set of low-profile drawer slides configured for mounting upon rails; wherein, the chassis includes at least one wide section for housing computer components. A server and a storage rack are described.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: December 26, 2017
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Gordon A. Frye, Ralph C. Frangioso, Jr., Robert P. Wierzbicki, John Blondin, Keith C. Johnson
  • Patent number: 9820405
    Abstract: Example embodiments of the present invention provide a method of manufacture and an apparatus for optimized server design using dense DIMM spacing, wide heatsink, improved routing channels, and improved air delivery to rear devices. The method of manufacture comprise providing a plurality of compliant pin memory sockets on a first side of a circuit board at a pitch less than that specified in a reference layout requiring solder tail memory sockets and providing a plurality of surface mount capacitors on the second side of the circuit board enabling at least one pair of the plurality of compliant pin memory sockets to be provided at the pitch less than that specified in the reference layout.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: November 14, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael R. Palis, Robert P. Wierzbicki
  • Patent number: 9585442
    Abstract: Example embodiments of the present invention relate to a system comprising a zip-locker and a zip-locker receiver. The zip-locker comprises a first portion and a second portion configured to fasten to an interconnect, at least one of the first portion and the second portion having ratchet teeth formed and extending longitudinally on an outer surface thereof. The zip-locker receiver is configured to ratchetably receive the zip-locker and comprises an aperture and a pawl disposed within the aperture configured to complement and cooperate with the ratchet teeth of the zip-locker to prevent removal of the zip-locker from the aperture of the zip-locker receiver at times the pawl of the zip-locker receiver is engaged with the ratchet teeth of the zip-locker.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: March 7, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Sean P. O'Donnell, David Boudreau, Albert F. Beinor, Jr., C. Ilhan Gundogan, Ralph C. Frangioso, Jr., Robert P. Wierzbicki
  • Patent number: 9578777
    Abstract: A computing system includes a low-profile chassis a motherboard disposed therein and at least one full-size circuit board coupled to the motherboard within the chassis. A method and another computing system are disclosed.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: February 21, 2017
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mickey Steven Felton, Robert P. Wierzbicki, Michael Gregoire, Ralph C. Frangioso, Jr., Jiabing Li, Justin Bandholz
  • Patent number: 9436234
    Abstract: An IT device includes a system board and a riser card socket electrically coupled to the system board and configured to receive a riser card. At least one expansion card slot is electrically coupled to the system board and configured to receive at least one expansion card. A controller assembly is electrically coupled to the system board and configured to energize the at least one expansion card slot while the riser card socket is empty.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: September 6, 2016
    Assignee: EMC Corporation
    Inventors: Mickey S. Felton, Robert P. Wierzbicki, Michael Gregoire
  • Patent number: 9261925
    Abstract: Example embodiments of the present invention provide a method of manufacture and an apparatus for optimized server design using dense DIMM spacing, wide heatsink, improved routing channels, and improved air delivery to rear devices. The method of manufacture comprise providing a plurality of compliant pin memory sockets on a first side of a circuit board at a pitch less than that specified in a reference layout requiring solder tail memory sockets and providing a plurality of surface mount capacitors on the second side of the circuit board enabling at least one pair of the plurality of compliant pin memory sockets to be provided at the pitch less than that specified in the reference layout.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: February 16, 2016
    Assignee: EMC Corporation
    Inventors: Michael R. Palis, Robert P. Wierzbicki
  • Patent number: 9207726
    Abstract: An IT device includes a system board including at least one microprocessor. At least one 2.5? disk drive is electrically coupled to the system board. At least one 3.5? disk drive is electrically coupled to the system board. An enclosure is configured to house the system board and includes at least one native 2.5? drive bay configured to house the at least one 2.5? disk drive, and at least one native 3.5? drive bay configured to house the at least one 3.5? disk drive.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: December 8, 2015
    Assignee: EMC Corporation
    Inventors: Ralph C. Frangioso, Robert P. Wierzbicki, W. Brian Cunningham
  • Patent number: 9131624
    Abstract: An IT chassis, configured to house IT componentry, includes a forward portion having a forward portion width and a rearward portion having a rearward portion width that is narrower than the forward portion width. A first side of the rearward portion is configured to engage a first slide assembly having a first slide width. A second side of the rearward portion is configured to engage a second slide assembly having a second slide width. The sum of the rearward portion width, the first slide width and the second slide width is substantially equal to the forward portion width.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: September 8, 2015
    Assignee: EMC Corporation
    Inventors: Keith C. Johnson, Ralph C. Frangioso, Robert P. Wierzbicki, W. Brian Cunningham, Michael Gregoire, Justin P. Bandholz, Jiabing Li
  • Patent number: 7969747
    Abstract: Apparatus includes a chassis assembly, a computing device configured to connect to a housing of the chassis assembly, and a line cord supplying power to the chassis assembly. The line cord has a first portion external to the chassis assembly and a second portion internal to the chassis assembly. The second portion has a shielding member that is in conductive contact with the housing to provide electromagnetic interference (EMI) shielding for the chassis assembly.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: June 28, 2011
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Ralph L. Hill
  • Patent number: 7572147
    Abstract: A line cord filter assembly for providing EMI shielding includes at a first end thereof a first plug for connecting to a power source external of a chassis and having at a second end thereof a second plug for connecting to electronic components disposed internally of the chassis. An elongated electrically conductive block has a serpentine shaped channel disposed in an inner surface thereof and extending between the first end and the second end. A electrical cable is disposed in the channel, having an inner electrical conductor and an outer electrical insulator, the electrical conductor electrically connected to the first end and the other end of the electrical conductor electrically connected to the second end. An electrically conductive, deformable sheet is disposed on the electrically conductive block over the outer electrical insulator with portions of the sheet projecting into portions of the channels around portions of the outer electrical insulator disposed within the channel.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: August 11, 2009
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Keith Johnson
  • Patent number: 7486526
    Abstract: An improved redundant computing apparatus has a chassis assembly configured to (i) mount to a standard electronic equipment rack and (ii) consume substantially 1U of space in a particular direction within the standard electronic equipment rack. The chassis assembly includes a housing and a midplane disposed within the housing. The apparatus further includes a set of power supply/blower assemblies configured to electrically connect to and electrically disconnect from the midplane of the chassis assembly in a hot swappable manner, and a set of computing devices configured to electrically connect to and electrically disconnect from the midplane of the chassis assembly in a hot swappable manner. By way of example, the set of computing devices is adapted to move data into and out of a set of disk drives on behalf of a set of external host computers.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: February 3, 2009
    Assignee: EMC Corporation
    Inventors: Ralph C. Frangioso, Jr., Thomas J. Connor, Jr., Robert P. Wierzbicki, Michael L. Schillinger, Steven R. Cieluch, Keith C. Johnson
  • Patent number: 7423859
    Abstract: An apparatus for protecting electronic equipment from voltage surges includes a network interface coupled to a computer device for connecting the computer device to a computer network and a discrete voltage surge protection device coupled to the computer network with a first unshielded cable and to the network interface with a second unshielded cable. The unshielded cable comprises at least one wire pair and the discrete protection device comprises a voltage suppressor device coupled between the wires of each wire pair. The discrete voltage surge protection device renders the apparatus compliant with the Telcordia (Bellcore) GR-1089-CORE Intrabuilding Lightning Surge Tests.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: September 9, 2008
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Brandon Barney
  • Patent number: 7362572
    Abstract: An improved redundant computing apparatus includes a chassis assembly configured to (i) mount to a standard electronic equipment rack and (ii) consume substantially 1U of space in a particular direction (e.g., vertical height) within the standard electronic equipment rack. The chassis assembly includes a housing and a midplane disposed within the housing. The apparatus further includes a set of power supply/blower assemblies configured to connect to the midplane of the chassis assembly through a front of the housing in a field replaceable manner, and a set of computing devices configured to connect to the midplane of the chassis assembly through a back of the housing in a field replaceable manner. By way of example, the set of computing devices is adapted to move data into and out of a set of disk drives on behalf of a set of external host computers.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: April 22, 2008
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Thomas J. Connor, Jr., Ralph C. Frangioso, Jr., Paul H. Maier, Jr., Matthew Borsini, Darrin Haug
  • Patent number: 7293181
    Abstract: Several processors have specifications setting forth that each processor be coupled to a separate specified voltage regulator circuit. Instead, a number of specified voltage regulator circuit(s) is coupled to the several processors. The number of voltage regulator circuit(s) is less than the number of processors. The processors and voltage regulator circuit(s) are coupled to a module, and a thermal limit for the module is maintained because the several processors are coupled to the smaller number of voltage regulator circuits.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: November 6, 2007
    Assignee: EMC Corporation
    Inventor: Robert P. Wierzbicki
  • Patent number: 7258569
    Abstract: Described are an apparatus and method for blind mating electrical connectors. A connector-alignment collar includes a frame with a multi-sided base portion. The sides of the base portion define an area within which to receive a connector closely. A guide cantilever extends substantially perpendicularly from the base portion at a first side of the frame, and an alignment cantilever extends substantially perpendicularly from the base portion at a second side of the frame opposite the first side. The connector-alignment collar is placed around a first electrical connector on a first circuit board. The alignment cantilever is inserted into an alignment hole in the second circuit board while a guide notch in an edge of the second circuit board is urged against the guide cantilever. After the alignment cantilever is inserted into the alignment hole in the second circuit board, the first electrical connector on the first circuit board mates with the second electrical connector on the second circuit board.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: August 21, 2007
    Assignee: EMC Corporation
    Inventors: Keith Johnson, John Palker, Robert P. Wierzbicki
  • Patent number: 7240154
    Abstract: A storage solution includes a first enclosure having modules and non-volatile memory, such as hard disk drives. These modules convert file I/O to block I/O. A second enclosure includes second modules and non-volatile memory. These modules are operable to cause the block I/O to be stored on the non-volatile storage in either the first or second enclosure. Thus, the modules that perform block I/O storage can access storage that resides in the file I/O server. In a different arrangement, the storage system has an enclosure having modules and non-volatile memory. One module converts file I/O to block I/O. Another module transfers block I/O to the non-volatile memory. The first and second modules are interconnected via a data bus. Block I/O is transferred between the first module and the second module via the data bus. The data bus crosses a midplane that interconnects the modules. The second module stores data in the enclosure.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: July 3, 2007
    Assignee: EMC Corporation
    Inventors: Ralph Frangioso, Robert P. Wierzbicki
  • Patent number: 7127621
    Abstract: According to one aspect of the invention, a power control architecture is provided wherein each one of a pair of devices controls the provision of power to the other device of the pair. In one embodiment of the invention, at least one power supply is coupled to each one of the pair of devices. The invention includes methods and apparatus that enable each device to reset the other device by signaling the power supplies to cycle power to that device. In addition, the invention includes methods and apparatus to preclude each device from erroneously cycling the power of the other device. With such an arrangement, processor reset functionality may be provided in a high availability system without the inclusion of one or more supervisory processors in the design, thereby reducing the overall cost and complexity of the supervisory functionality.
    Type: Grant
    Filed: December 21, 2002
    Date of Patent: October 24, 2006
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Phillip J. Roux
  • Patent number: 6789206
    Abstract: A compute element which functions at a plurality of different power and operational states comprises a chassis which is shaped to include an interior cavity. A motherboard responsible for regulating the operational state of the compute element is disposed within the interior cavity of the chassis. An element controller responsible for regulating the power state of the compute element is similarly disposed within the interior cavity of the chassis and in connection with the motherboard. A power button is disposed in the chassis in connection with the element controller. The power button is a push-button having a built-in liquid crystal display capable of providing graphics and/or text displays and a backlight capable of providing variable color and frequency backlighting. In use, the power button enables a user to change the power state of the compute element through actuation thereof. In addition, the power button acts as an indicator for identifying the power and operational state of the compute element.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: September 7, 2004
    Assignee: EMC Corporation
    Inventors: Robert P. Wierzbicki, Maurice Edward Valois, Paul O. Malenfant, Gregory William Lazar