Abstract: A cold plate is disclosed for cooling electronics within a missile. The cold plate includes a housing enclosing a compartment. An outlet manifold is inside the compartment. A wick is inside the compartment and is adjacent to the outlet manifold. A liquid inlet is fluidically connected to the wick. A vapor outlet fluidically connects the outlet manifold to atmosphere or space.

Abstract: A system of shields designed to provide substantially greater protection, head to toe, against radiation exposure to health care workers in a hospital room during procedures which require real-time imaging. The shields are placed around the patient and the x-ray table and provide protection even when the x-ray tube is moved to various angles around the patient.

Abstract: X-ray procedure tables with improved structural strength that enable radiation shielding and integrated medical device and monitoring systems. The design allows the incorporation of an integrated patient support structure, radiation shielding and associated devices and conduits for medical care in procedures that employ X-ray imaging. The X-ray procedure table may be formed from a sled table attachable to a pedestal, with at least one side member extending along a bottom of the sled table to add structural rigidity.

Abstract: A system of shields designed to provide substantially greater protection, head to toe, against radiation exposure to health care workers in a hospital room during procedures which require real-time imaging. The shields are placed around the patient and the x-ray table and provide protection even when the x-ray tube is moved to various angles around the patient.

Abstract: A method and an apparatus for application submission and distribution based on an intermediate code are described. The intermediate code may be received at a server device and stored in a data storage. The intermediate code may have been built from a source code. The intermediate code may include one or more build options applied for building an executable code from the source code. The executable code may be provided to target devices of a processor platform to perform data processing operations specified in the source code. In one embodiment, a particular executable code may be generated from the intermediate code at the server device to target a particular processor platform according to the build options embedded in the intermediate code. The particular executable code may be forwarded to a device requesting for an application corresponding to the particular executable code to perform the data processing operations.

Abstract: Embodiments provide a system for managing and displaying data associated with a plurality of devices, including: a display device; a database for storing data associated with a plurality of devices; and a processor that executes a program of instructions to: receive, from one of: a local data source and a non-local data source, device identification data for each of the plurality of devices; receive, from at least one local data source and at least one non-local data source, a plurality of information characteristics for at least one of the plurality of devices; reconcile the plurality of information characteristics; compile the reconciled plurality of information characteristics into at least one data table; store, in the database, data associated with the plurality of devices, wherein the data comprises the device identification data and at least part of the at least one data table; and display, on the display device, a graphical user interface comprising the data.

Abstract: A method and an apparatus for application submission and distribution based on an intermediate code are described. The intermediate code may be received at a server device and stored in a data storage. The intermediate code may have been built from a source code. The intermediate code may include one or more build options applied for building an executable code from the source code. The executable code may be provided to target devices of a processor platform to perform data processing operations specified in the source code. In one embodiment, a particular executable code may be generated from the intermediate code at the server device to target a particular processor platform according to the build options embedded in the intermediate code. The particular executable code may be forwarded to a device requesting for an application corresponding to the particular executable code to perform the data processing operations.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: A control method for an haptic device is provided with particular attention to motor control amplifiers exploiting the inate motor dynamics of DC motors. The control method encompasses a digital and analog circuit. In the digital circuit, a command voltage is determined by a digital controller utilizing sensed motion information of the haptic device and a motion command signal. In the analog circuit, an amplifier applies a voltage to an electrical DC motor. The applied voltage incorporates the determined command voltage from the digital controller and a voltage to reduce the electrical dynamics of the electrical DC motor.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: A system for adding advanced instructions to a microprocessor includes a language for formally capturing the new instructions and a method for generating hardware implementations and software tools for the extended processors. The extension language provides for additions of VLIW instructions, complex load/store instructions, more powerful description styles using functions, more powerful register operands, and a new set of built-in modules. The method is capable of generating fully-pipelined micro-architectural implementations for the new instructions in the form of synthesizable HDL descriptions which can be processed by standard CAD tools. The method is also capable of generating software components for extending software development tools for the microprocessor with new instructions.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: In selecting and building a processor configuration, a user creates a new set of user-defined instructions, places them in a file directory, and invokes a tool that processes the user instructions and transforms them into a form usable by the software development tools. The user then invokes the software development tools, telling the tools to dynamically use the instructions created in the new directory. In this way, the user may customize a processor configuration by adding new instructions and within minutes, be able to evaluate that feature. The user is able to keep multiple sets of potential instructions and easily switch between them when evaluating their application.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.