Abstract: A method of providing hardware description language-embedded regular expression support for module iteration and interconnection. Regular expressions such as those used in the Perl programming language are used in a preprocessing process to generate instances and interconnections in a hardware description to automate the generation of repetitive code for a Hardware Description Language (HDL). This is accomplished by generating HDL code with embedded regular expressions, analyzing the code to identify the regular expressions and checking to see that the code complies with the HDL grammar rules. A data structure is generated for each module or submodule and these data structures are then elaborated to expand them into the instances and interconnections. A text generator traverses the elaborated data structures and generates HDL compliant text.