Patents by Inventor Robert Pitts
Robert Pitts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9001570Abstract: A memory configurable to be used in an RTA mode includes an input latch configured to receive an input address bus and to generate a latched address bus that corresponds to a memory location. An address flop is configured to save the latched address and to generate a flopped address. A first block address pre-decoder stage is configured to generate a pre-decoded latched address to an RTA generation logic in response to the latched address bus; and a second block address pre-decoder configured to generate a pre-decoded flopped address to the RTA generation logic in response to the flopped address. The RTA generation logic generates an RTA enable signal one clock cycle before a memory block access, to activate a memory block corresponding to the memory location, such that an array supply voltage of the memory block starts charging one clock cycle before a memory block access.Type: GrantFiled: September 27, 2013Date of Patent: April 7, 2015Assignee: Texas Instruments IncorporatedInventors: Rashmi Sachan, Parvinder Rana, Abhishek Kesarwani, Robert Pitts
-
Publication number: 20150092475Abstract: A memory configurable to be used in an RTA mode includes an input latch configured to receive an input address bus and to generate a latched address bus that corresponds to a memory location. An address flop is configured to save the latched address and to generate a flopped address. A first block address pre-decoder stage is configured to generate a pre-decoded latched address to an RTA generation logic in response to the latched address bus; and a second block address pre-decoder configured to generate a pre-decoded flopped address to the RTA generation logic in response to the flopped address. The RTA generation logic generates an RTA enable signal one clock cycle before a memory block access, to activate a memory block corresponding to the memory location, such that an array supply voltage of the memory block starts charging one clock cycle before a memory block access.Type: ApplicationFiled: September 27, 2013Publication date: April 2, 2015Applicant: Texas Instruments IncorporatedInventors: Rashmi Sachan, Parvinder Rana, Abhishek Kesarwani, Robert Pitts
-
Patent number: 7407006Abstract: A system and method for logging a formation adjacent to a borehole. The system includes a conveyance member, a memory module in communication with the conveyance member, a communications module in communication with the memory module, and a logging tool in communication with the communications module, wherein the communications module is configured to facilitate communication between the memory module and the logging tool.Type: GrantFiled: April 22, 2005Date of Patent: August 5, 2008Assignee: Weatherford/Lamb, Inc.Inventors: Paul Wilson, Robert Malloy, Stephen Senn, Tom Standley, Robert Pitts
-
Publication number: 20070051071Abstract: A system and method for installing a protective covering onto at least one substantially entire side portion of a stack of products. The system includes an apparatus for automatically, and preferably continuously, robotically moving, positioning and fastening a protective covering to at least one side portion of a stack of products. The side portions of the stack of products can vary in dimensions. The protective covering can also protect a top portion of the stack of products. The stack of products can include stacks of plywood, particleboard, OSB, lumber or other bundles of predetermined sizes.Type: ApplicationFiled: October 25, 2006Publication date: March 8, 2007Applicant: Willamette Valley CompanyInventors: Eldon Owen, Asa DeForest, Brian Clark, Robert Pitts, Dwayne Schwake
-
Publication number: 20070023859Abstract: The present invention provides a semiconductor device fuse, comprising a metal layer and a first semiconductor layer that electrically couples the metal layer to a fuse layer, wherein the fuse layer is spaced apart from the metal layer. The semiconductor device fuse further comprises a second semiconductor layer that forms a blow junction interface with the fuse layer. The blow junction interface is configured to form an open circuit when a predefined power is transmitted through the second semiconductor layer to the fuse layer.Type: ApplicationFiled: July 29, 2005Publication date: February 1, 2007Applicant: Texas Instruments IncorporatedInventors: Robert Pitts, Bryan Sheffield, Roger Griesmer, Joe McPherson
-
Publication number: 20070011639Abstract: Methods are disclosed for the layout and manufacture of microelectronic circuits. The methods employ the monitoring of the placement of macros within circuit layouts for design rule compliance. Upon detection of noncompliance, the macros associated with noncompliance are adapted to bring the layout within the design rules. In a preferred embodiment of the invention monitoring the relative positions of macros includes identifying instances of coinciding macro (x, y) coordinates. Adapting noncompliant macros further includes steps for maintaining minimum (x, y) distances between adjacent macro corners.Type: ApplicationFiled: July 5, 2005Publication date: January 11, 2007Inventor: Robert Pitts
-
Publication number: 20060267154Abstract: Disclosed is a semiconductor wafer with an array of integrated circuit chips with scribe lane structures forming edge and intra-chip seals for use in protecting the IC circuitry. Substantially parallel scribe seal structures extend around the periphery of each chip; the two scribe seal structures have a separation gap. Preferred embodiments of the invention also include wafers of ICs each having two or more distinctive circuitry blocks such as analog and digital circuitry, separated by an intra-chip seal. Preferred embodiments of also include ICs having two or more distinctive circuit blocks separated by a scribe seal structure with a separation gap and a routing channel for use in passing signals among the circuit blocks.Type: ApplicationFiled: May 11, 2005Publication date: November 30, 2006Inventors: Robert Pitts, Thad Briggs, Srinivasan Venkatraman
-
Publication number: 20060220919Abstract: A system for tracking and monitoring one or more radioactive sources as the sources are transported or stored. The system continuously and automatically monitors each source for a security breach, which includes tampering, moving, exchange or removal of a source by unauthorized personnel. Any security breach is immediately reported to a remote monitoring station, wherein the report contains pertinent information relating to the breach. Status reports of the one or more monitored and tracked sources are automatically transmitted to the remote monitoring station at predetermined time intervals. In addition, a status report of one or more sources can be obtained by means of a query from the remote monitoring station.Type: ApplicationFiled: April 1, 2005Publication date: October 5, 2006Inventor: Robert Pitts
-
Publication number: 20060168911Abstract: A system and method for installing a protective covering onto at least one substantially entire side portion of a stack of products. The system includes an apparatus for automatically, and preferably continuously, robotically moving, positioning and fastening a protective covering to at least one side portion of a stack of products. The side portions of the stack of products can vary in dimensions. The protective covering can also protect a top portion of the stack of products. The stack of products can include stacks of plywood, particleboard, OSB, lumber or other bundles of predetermined sizes.Type: ApplicationFiled: February 3, 2005Publication date: August 3, 2006Applicant: Willamette Valley CompanyInventors: Eldon Owen, Asa DeForest, Brian Clark, Robert Pitts, Dwayne Schwake
-
Publication number: 20060093721Abstract: French crullers comprising at least about 10% egg yolk and at least about 15% starch are further provided with a flavoring such as chocolate, vanilla, fruits, cocoa and combinations thereof. These crullers, with or without the flavoring can be formed as cruller globules by extruding the dough through orifices in a plunger.Type: ApplicationFiled: October 28, 2004Publication date: May 4, 2006Inventors: Robert Pitts, Kathleen LeClair, Patricia Vincente
-
Publication number: 20050247995Abstract: Severable metal contacts (42) are provided for use within a circuit in a semiconductor device whereby an open circuit may be formed by the application of a pre-selected voltage or current. Preferred embodiments and associated methods are described in which a semiconductor device fuse (30) includes first and second conductors (36, 38) having first and second metallic contacts (40, 42) operably coupled to a conductive layer (34) for forming an electrical path. At least one of the metallic contacts (42) is configured to operate as a metallic fuse element adapted to form an open circuit (44) in response to reaching a pre-selected voltage threshold or current. Preferred embodiments of the invention are described in which it is used for programmable read only memory (PROM) elements.Type: ApplicationFiled: May 6, 2004Publication date: November 10, 2005Inventors: Robert Pitts, Bryan Sheffield, Roger Greismer
-
Publication number: 20050211433Abstract: A system and method for logging a formation adjacent to a borehole. The system includes a conveyance member, a memory module in communication with the conveyance member, a communications module in communication with the memory module, and a logging tool in communication with the communications module, wherein the communications module is configured to facilitate communication between the memory module and the logging tool.Type: ApplicationFiled: April 22, 2005Publication date: September 29, 2005Inventors: Paul Wilson, Robert Malloy, Stephen Senn, Tom Standley, Robert Pitts
-
Publication number: 20050139759Abstract: Methods and apparatus for logging a wellbore and determining a presence or absence of a hydrocarbon bearing formation are disclosed. A sonde includes at least two gamma radiation detectors that are utilized for chlorine logging and lifetime logging in combination. Additionally, two detectors of the sonde are spaced axially from each other at different distances from the source to enable determination and compensation for various other parameters such as porosity and water flow velocity. Appropriate gating of the detectors enables sensing total counts of radiation emitted from adjacent formations and sensing of specific energy ranges of radiation when the formation is bombarded with energy. Signals from the lifetime logging enable adjustment of the chlorine logging for a borehole effect and background radiation. The detectors can include a sheath of a high capture cross-section material that interacts with neutrons to produce gamma radiation to shield the detectors.Type: ApplicationFiled: November 30, 2004Publication date: June 30, 2005Inventors: Robert Pitts, Leonard Casey, Ronald Bothner
-
Publication number: 20050086038Abstract: According to one embodiment, a method for isolating degradation mechanisms in transistors includes providing a ring oscillator having a plurality of delay elements. Each delay element operates as a delay element through the use of one or more transistors of only a first type and no transistors of the opposite type. The method further includes operating the ring oscillator and measuring the frequency resulting from the ring oscillator over time. The magnitude of an isolated degradation mechanism is determined based on a comparison of the measured frequency and an expected frequency for the ring oscillator absent degradation.Type: ApplicationFiled: October 17, 2003Publication date: April 21, 2005Inventors: Vijay Reddy, Robert Pitts