Patents by Inventor Robert Ploessl

Robert Ploessl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220266343
    Abstract: Additive manufacturing structures and methods that enable the facile release of 3D printed parts are described. In one implementation, an additive manufacturing structure includes: a body; and a recessed section formed through a surface of the body, the recessed section comprising: a pour hole for filling the recessed section with a liquid metal or metal alloy that solidifies into an insert having a surface for forming a 3D object in a 3D printing device; and one or more air holes configured to release air displaced by the liquid metal or metal alloy.
    Type: Application
    Filed: February 23, 2022
    Publication date: August 25, 2022
    Inventors: David P. Socha, Geoff Beckwith, Robert Ploessl
  • Patent number: 6943113
    Abstract: A two-step chemical mechanical polishing (CMP) process is provided to minimize (reduce) dishing of metal lines in trenches in an insulation (oxide) layer of each of a plurality of semiconductor wafers during fabrication thereof. For each wafer, the first step involves CMP of a metal layer disposed on the oxide layer and having a lower portion located in the trenches for forming metal lines and an upper portion overlying the lower portion. The first step polishing uses a first polishing pad to remove the bulk of the metal layer upper portion while generating concomitant CMP residue, and leaves a minimized (reduced) remainder of the metal layer upper portion without dishing of the metal layer lower portion in the trenches. The second step continues the CMP with a second polishing pad to remove the remainder of the metal layer upper portion with minimized (reduced) dishing of the metal layer lower portion to an extent providing the metal lines as individual metal lines in the trenches.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: September 13, 2005
    Assignee: Infineon Technologies AG
    Inventors: Chenting Lin, Robert Ploessl
  • Patent number: 6124206
    Abstract: An improved hard mask is provided to reduced pad erosion during semiconductor fabrication. The hard mask includes an etch stop layer between first and second hard mask layers.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: September 26, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Bertrand Flietner, Robert Ploessl, Monika Gschoederer
  • Patent number: 6051497
    Abstract: A method of forming very small diameter metal lines in a dielectric layer 12 comprising forming an opening in the dielectric layer using photolithographic techniques, filling the opening with an insulating material 16 and planarizing the dielectric layer using chemical metal polishing techniques, which are continued so as to form small trenches 17 in the dielectric material on either side of the insulating material, filling in the trenches with metal and planarizing the metal layer using chemical metal polishing.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: April 18, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Robert Ploessl
  • Patent number: 5972787
    Abstract: The method of polishing metal layers on wafers comprises the steps of: providing indicator areas on said wafer, said indicator areas having combinations of line widths and pattern factors violating existing ground rules of metal lines thereby said indicator areas being dished out during said polishing using a chemical-mechanical polisher to polish the metal layers to remove material therefrom, inspecting indicator areas on the wafer to determine an amount of material removed from said areas, and adjusting the operation of the chemical-mechanical polisher in response to the inspection of the indicator areas. The indicator areas may include macroblocks comprised of a multitude of individual blocks. The wafer may be inspected by optically identifying the polishing state of to blocks in the macroblock. Additionally, the process may be automated for mass production.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: October 26, 1999
    Assignee: International Business Machines Corp.
    Inventors: Karl E. Boggs, Chenting Lin, Joachim F. Nuetzel, Robert Ploessl, Maria Ronay, Florian Schnabel, Jeremy K. Stephens
  • Patent number: 5907771
    Abstract: Improved technique of forming trench capacitors without causing excessive erosion at the edges of the array region resulting from polishing. The erosion is reduced by providing a block mask to protect the array region while partially removing a portion of the hard mask used to etch the trenches in the field region. The partial etch equalizes the height of the hard mask in the array and field region after formation of the deep trenches by a reactive ion etch.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: May 25, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Robert Ploessl, Bertrand Flienter
  • Patent number: 5885137
    Abstract: A polishing pad conditioner and a method for conditioning a polishing pad of a chemical/mechanical polishing system. The polishing pad conditioner includes a body defining an upper surface and a lower surface; at least one conditioning element mounted at the lower surface of the body, the conditioning element including a conditioning surface and an opening adjacent the conditioning surface; and a vacuum source operatively connected to the opening in the conditioning element. The method for conditioning a polishing pad includes the steps of holding a polishing pad conditioner including a conditioning element, a conditioning surface thereon and an opening in the conditioning element adjacent the conditioning surface in contact with a surface of the polishing pad; applying a vacuum source to the pad, the vacuum source being operatively connected to the conditioning element; and conditioning the surface of the polishing pad while simultaneously vacuuming particles therefrom.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: March 23, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventor: Robert Ploessl