Patents by Inventor Robert Priewasser
Robert Priewasser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10128752Abstract: In an example, a device for operating a switching converter is configured to determine a set of perturbed duty cycle values for a converter. A perturbation sequence is superimposed simultaneously onto a duty cycle value for each phase of the converter to form the set of perturbed duty cycle values. The device is further configured to determine an output voltage of the converter that occurs when the converter operates based on the set of perturbed duty cycle values, determine a coefficient vector of system parameters for the converter based on the output voltage and the set of perturbed duty cycle values, and tune a controller based on the coefficient vector. The duty cycle value for each phase of the converter is based on a respective command duty cycle value of a set of command duty cycle values output by the controller.Type: GrantFiled: December 19, 2017Date of Patent: November 13, 2018Assignee: Infineon Technologies AGInventors: Marc Kanzian, Andreas Berger, Harald Gietler, Stefano Marsili, Robert Priewasser, Christoph Unterrieder
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Patent number: 10075058Abstract: In an example, a device for operating a switching converter is configured to receive a composite command duty cycle value. The device is further configured to generate an effective duty cycle value based on a voltage at a switching node. The device is further configured to generate a duty cycle mismatch value using the composite command duty cycle value and the effective duty cycle value so as to generate a plurality of duty cycle mismatch values. Each duty cycle mismatch value of the plurality of duty cycle mismatch values corresponds to a candidate natural frequency value of the converter. The device is further configured to output a candidate natural frequency value of the converter that corresponds to a maximum duty cycle mismatch of the plurality of duty cycle mismatch values.Type: GrantFiled: October 30, 2017Date of Patent: September 11, 2018Assignee: Infineon Technologies AGInventors: Harald Gietler, Andreas Berger, Marc Kanzian, Robert Priewasser, Christoph Unterrieder
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Patent number: 9520785Abstract: A nonlinear converter, such as a DC-DC converter, includes a nonlinear controller configured to receive an output voltage and a current, and configured to generate a PWM signal. The PWM signal is generated based on setting the converter to a first phase associated with both buck and boost modes when a clock signal is asserted, and selecting a second phase associated with the buck mode of the converter, if a sliding function signal achieves a first predetermined relationship with respect to a buck threshold before a next clock signal is asserted, or selecting a third phase associated with the boost mode of the converter, if the sliding function signal achieves a second predetermined relationship with respect to a boost threshold before a next clock signal is asserted. The nonlinear converter may include a power stage configured to provide the output voltage and a coil current to the nonlinear controller.Type: GrantFiled: November 17, 2009Date of Patent: December 13, 2016Assignee: Infineon Technologies Austria AGInventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
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Patent number: 9515642Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.Type: GrantFiled: January 27, 2014Date of Patent: December 6, 2016Assignee: Infineon Technologies AGInventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
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Patent number: 8779740Abstract: An embodiment switching converter includes a power stage that receives an input voltage for converting it into an output voltage and provides a load current to a load operably coupled to the power stage. The power stage includes an inductor carrying an inductor current and a digital controller configured to regulate the output voltage to a level close to a reference voltage using a pulse width modulated (PWM) signal supplied to the power stage.Type: GrantFiled: August 19, 2011Date of Patent: July 15, 2014Assignee: Infineon Technologies Austria AGInventors: Stefano Marsili, Matteo Agostinelli, Robert Priewasser
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Publication number: 20140139296Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.Type: ApplicationFiled: January 27, 2014Publication date: May 22, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Stefano MARSILI, Dietmar STRAEUSSNIGG, Luca BIZJAK, Robert PRIEWASSER, Matteo AGOSTINELLI
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Patent number: 8638079Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.Type: GrantFiled: February 27, 2010Date of Patent: January 28, 2014Assignee: Infineon Technologies AGInventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
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Patent number: 8578238Abstract: A system for execution of a decoding method is disclosed. The system is capable of executing at least two data decoding methods which are different in underlying coding principle, wherein at least one of the data decoding methods requires data shuffling operations on the data. In one aspect, the system includes at least one application specific processor having an instruction set having arithmetic operators excluding multiplication, division and power. The processor is selected for execution of approximations of each of the at least two data decoding methods. The system also includes at least a first memory unit, e.g. background memory, for storing data. The system also includes a transfer unit for transferring data from the first memory unit towards the at least one programmable processor. The transfer unit includes a data shuffler. The system may also include a controller for controlling the data shuffler independent from the processor.Type: GrantFiled: April 1, 2010Date of Patent: November 5, 2013Assignees: IMEC, Samsung Electronics Co., Ltd.Inventors: Robert Priewasser, Bruno Bougard, Frederik Naessens
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Publication number: 20130043852Abstract: An embodiment switching converter includes a power stage that receives an input voltage for converting it into an output voltage and provides a load current to a load operably coupled to the power stage. The power stage includes an inductor carrying an inductor current and a digital controller configured to regulate the output voltage to a level close to a reference voltage using a pulse width modulated (PWM) signal supplied to the power stage.Type: ApplicationFiled: August 19, 2011Publication date: February 21, 2013Applicant: Infineon Technologies Austria AGInventors: Stefano Marsili, Matteo Agostinelli, Robert Priewasser
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Publication number: 20110210707Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.Type: ApplicationFiled: February 27, 2010Publication date: September 1, 2011Inventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
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Publication number: 20110115453Abstract: A nonlinear converter, such as a DC-DC converter, includes a nonlinear controller configured to receive an output voltage and a current, and configured to generate a PWM signal. The PWM signal is generated based on setting the converter to a first phase associated with both buck and boost modes when a clock signal is asserted, and selecting a second phase associated with the buck mode of the converter, if a sliding function signal achieves a first predetermined relationship with respect to a buck threshold before a next clock signal is asserted, or selecting a third phase associated with the boost mode of the converter, if the sliding function signal achieves a second predetermined relationship with respect to a boost threshold before a next clock signal is asserted. The nonlinear converter may include a power stage configured to provide the output voltage and a coil current to the nonlinear controller.Type: ApplicationFiled: November 17, 2009Publication date: May 19, 2011Applicant: Infineon Technologies Austria AGInventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
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Publication number: 20100268918Abstract: A system for execution of a decoding method is disclosed. The system is capable of executing at least two data decoding methods which are different in underlying coding principle, wherein at least one of the data decoding methods requires data shuffling operations on the data. In one aspect, the system includes at least one application specific processor having an instruction set having arithmetic operators excluding multiplication, division and power. The processor is selected for execution of approximations of each of the at least two data decoding methods. The system also includes at least a first memory unit, e.g. background memory, for storing data. The system also includes a transfer unit for transferring data from the first memory unit towards the at least one programmable processor. The transfer unit includes a data shuffler. The system may also include a controller for controlling the data shuffler independent from the processor.Type: ApplicationFiled: April 1, 2010Publication date: October 21, 2010Applicants: IMEC, Samsung Electronics Co., Ltd.Inventors: Robert Priewasser, Bruno Bougard, Frederik Naessens