Abstract: Techniques for accelerating Keccak/SHA3 are described. In some examples, Keccak accelerator circuitry that includes block transformation circuitry to perform rounds of a block permutation function, wherein the block transformation circuitry include an internal state storage is coupled to a combined load/store buffer, wherein the combined load/store buffer is to be loaded with data to be used as input data to the block permutation function and is to store data output from the Keccak accelerator circuitry.