Patents by Inventor Robert R. Fulton

Robert R. Fulton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10712768
    Abstract: Described is an apparatus for over-clocking or under-clocking, the apparatus comprises: a locked loop (e.g., phase locked loop or frequency locked loop) having a feedback divider, the locked loop to receive a reference clock and to compare it with a feedback clock which is output from the feedback divider, and to generate an output clock; a post locked loop divider, coupled to the locked loop, to receive the output clock and to generate a base clock for other logic units; and a control logic to adjust first and second divider ratios for the feedback divider and the post locked loop divider respectively for over-clocking or under-clocking the base clock such that the locked loop remains locked while being over-clocked or under-clocked.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: July 14, 2020
    Assignee: Intel Corporation
    Inventors: Surya Musunuri, Jagannadha R. Rapeta, Mark L. Elzinga, Young Min Park, Robert R. Fulton
  • Publication number: 20190220054
    Abstract: Described is an apparatus for over-clocking or under-clocking, the apparatus comprises: a locked loop (e.g., phase locked loop or frequency locked loop) having a feedback divider, the locked loop to receive a reference clock and to compare it with a feedback clock which is output from the feedback divider, and to generate an output clock; a post locked loop divider, coupled to the locked loop, to receive the output clock and to generate a base clock for other logic units; and a control logic to adjust first and second divider ratios for the feedback divider and the post locked loop divider respectively for over-clocking or under-clocking the base clock such that the locked loop remains locked while being over-clocked or under-clocked.
    Type: Application
    Filed: January 18, 2019
    Publication date: July 18, 2019
    Applicant: Intel Corporation
    Inventors: Surya Musunuri, Jagannadha R. Rapeta, Mark L. Elzinga, Young Min Park, Robert R. Fulton
  • Patent number: 6657507
    Abstract: An oscillator circuit including an integrated circuit amplifier, an integrated circuit active resistance circuit to set the gain of the amplifier, a crystal resonator to set the frequency of the signal generated by the oscillator circuit, and a pair of capacitors respectively situated at the inputs and outputs of the amplifier to assist in the starting of the oscillation signal. The active resistance circuit is responsive to an input signal in order to set the gain of the amplifier slightly above unity gain in order to meet the criterion for oscillation, but not too much above unity gain where the oscillator would unduly consume too much power. Thus, the oscillator has inherent low power characteristics. The active resistance circuit allows the amplifier gain to be set by software or other electronic means.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: December 2, 2003
    Assignee: Intel Corporation
    Inventors: Robert R. Fulton, Chinnugounder Senthilkumar, Tea Lee
  • Publication number: 20030122629
    Abstract: An oscillator circuit including an integrated circuit amplifier, an integrated circuit active resistance circuit to set the gain of the amplifier, a crystal resonator to set the frequency of the signal generated by the oscillator circuit, and a pair of capacitors respectively situated at the inputs and outputs of the amplifier to assist in the starting of the oscillation signal. The active resistance circuit is responsive to an input signal in order to set the gain of the amplifier slightly above unity gain in order to meet the criterion for oscillation, but not too much above unity gain where the oscillator would unduly consume too much power. Thus, the oscillator has inherent low power characteristics. The active resistance circuit allows the amplifier gain to be set by software or other electronic means.
    Type: Application
    Filed: January 2, 2002
    Publication date: July 3, 2003
    Inventors: Robert R. Fulton, Chinnugounder Senthilkumar, Tea Lee