Abstract: Disclosed is a process fo fabrication of a MESFET in which starting with a GaAs substrate having a shallow N- layer covered with nitride, a submicron-wide dummy gate mask consisting of upper and lower portions made of dissimilar materials is formed. Multilayer organic and sidewall image transfer techniques are employed for forming the mask. The nitride is etched using the gate mask. N+ source/drain are formed by ion implantation. The lower portion of the gate mask is etched to expose the periphery of the nitride. Refractory metal for source/drain contacts is deposited. An oxide laeyr is deposited to passivate the source/drain contacts and to fully cover the exposed nitride periphery. The gate mask is removed. High temperature anneal is accomplished to simultaneously activate the N+ regions and anneal the contact metal. By RIE the exposed nitride removed leaving submicron spacers thereof. Gate metal is deposited in the gate region.

Abstract: A composite insulator structure separating adjacent layers of patterned metal on an LSI chip is disclosed. The composite insulator consists of a relatively thick layer of sputtered oxide and a thin layer of plasma nitride. The relatively thin layer can be underneath, inside or on top of the thick layer. The relatively thin layer is conformal and able to cover projections on the underlying metal and prevent interlevel shorting between the patterned layers.

Abstract: Aluminum/copper alloy conductors are made by forming a patterned layer of copper on a layer of aluminum. The portion of the aluminum layer which is not protected by the copper layer is removed by reactive ion etching and the resulting structure is then heated to cause the copper to diffuse into, and alloy with the aluminum layer.