Abstract: A method of forming alignment marks includes providing a III-V compound substrate having a device region and an alignment mark region, forming a hardmask layer having a first set of openings on the alignment mark region exposing a first surface portion of the III-V compound substrate and a second set of openings on the device region exposing a second surface portion of the III-V compound substrate, etching the exposed surface of the III-V compound substrate using the hardmask layer as a mask to form a plurality of trenches, and epitaxially regrowing a semiconductor layer in the trenches to form the alignment marks extending to a predetermined height over the processing surface of the III-V compound substrate.

Abstract: A method of forming alignment marks includes providing a III-V compound substrate having a device region and an alignment mark region, forming a hardmask layer having a first set of openings on the alignment mark region exposing a first surface portion of the III-V compound substrate and a second set of openings on the device region exposing a second surface portion of the III-V compound substrate, etching the exposed surface of the III-V compound substrate using the hardmask layer as a mask to form a plurality of trenches, and epitaxially regrowing a semiconductor layer in the trenches to form the alignment marks extending to a predetermined height over the processing surface of the III-V compound substrate.

Abstract: A method of forming alignment marks includes providing a III-V compound substrate having a device region and an alignment mark region, forming a hardmask layer having a first set of openings on the alignment mark region exposing a first surface portion of the III-V compound substrate and a second set of openings on the device region exposing a second surface portion of the III-V compound substrate, etching the exposed surface of the III-V compound substrate using the hardmask layer as a mask to form a plurality of trenches, and epitaxially regrowing a semiconductor layer in the trenches to form the alignment marks extending to a predetermined height over the processing surface of the III-V compound substrate.

Abstract: A touch sensor having conductive circuits on both surfaces of a substrate is fabricated by including UV-blocking material into the substrate or depositing UV-blocking layer on the substrate. This can be used for fabricating sensors having transparent conductor circuits, or having metallic circuits, which are opaque to visible light. Photoresist is applied to both surfaces of the substrate and patterns are transferred to the photoresist by exposure to UV radiation. The UV-blocking layer prevents UV-radiation applied to one side from exposing the opposite side. If desired, both photoresist layers may be exposed simultaneously by splitting one UV beam.

Abstract: Light reflection from a metal mesh touch sensor is reduced or prevented by encasing the metal lines with a passivation coating and including non-reflective nanoparticles in the patterning photoresist. The photoresist is mixed with catalytic nanoparticles wherein the nanoparticles are formed to minimize light reflection. The nanoparticles may be carbon coated metallic particles, or uncoated palladium nanoparticles. Also, a standoff photoresist layer may be included between the substrate and the photoresist composition to prevent reflection from the edges of the metallic lines.

Abstract: A method of forming alignment marks includes providing a III-V compound substrate having a device region and an alignment mark region, forming a hardmask layer having a first set of openings on the alignment mark region exposing a first surface portion of the III-V compound substrate and a second set of openings on the device region exposing a second surface portion of the III-V compound substrate, etching the exposed surface of the III-V compound substrate using the hardmask layer as a mask to form a plurality of trenches, and epitaxially regrowing a semiconductor layer in the trenches to form the alignment marks extending to a predetermined height over the processing surface of the III-V compound substrate.

Abstract: A method of forming alignment marks includes providing a III-V compound substrate having a device region and an alignment mark region, forming a hardmask layer having a first set of openings on the alignment mark region exposing a first surface portion of the III-V compound substrate and a second set of openings on the device region exposing a second surface portion of the III-V compound substrate, etching the exposed surface of the III-V compound substrate using the hardmask layer as a mask to form a plurality of trenches, and epitaxially regrowing a semiconductor layer in the trenches to form the alignment marks extending to a predetermined height over the processing surface of the III-V compound substrate.

Abstract: A method for fabricating a metallic wire mesh touch sensor with reduced visibility. A metallic wire mesh is formed on a transparent substrate such that the surface of the metallic wires is roughened or textured, so as to cause high scattering of incident light, thereby minimizing specularly reflected light towards the user. The metal lines are formed over patterned catalytic photoresist. The rough or textured surface of the metallic wires is achieved by roughening or texturing the catalytic photoresist, by selecting parameters of electronless plating of copper, or both. An RMS surface roughness of about 50 nm would scatter approximately 70% of incident cyan light incident at 30°.

Abstract: Touchscreen, comprising: a display device; a touch sensor over the display device; and, a cover lens; wherein the touch sensor comprises: a transparent substrate; a layer of catalytic photoresist patterns of a catalytic photoresist composition, the catalytic photoresist composition including a photoresist and catalytic nanoparticles; a metal conductive layer with conductive patterns over the layer of catalytic photoresist patterns; a metal passivation layer over the metal layer; and a transparent protective layer over the metal passivation layer.

Abstract: Touchscreen, comprising: a display device; a touch sensor over the display device; and, a cover lens; wherein the touch sensor comprises: a transparent substrate; a layer of catalytic photoresist patterns of a catalytic photoresist composition, the catalytic photoresist composition including a photoresist and catalytic nanoparticles; a metal conductive layer with conductive patterns over the layer of catalytic photoresist patterns; a metal passivation layer over the metal layer; and a transparent protective layer over the metal passivation layer.

Abstract: A touch sensor having conductive circuits on both surfaces of a substrate is fabricated by including UV-blocking material into the substrate or depositing UV-blocking layer on the substrate. This can be used for fabricating sensors having transparent conductor circuits, or having metallic circuits, which are opaque to visible light. Photoresist is applied to both surfaces of the substrate and patterns are transferred to the photoresist by exposure to UV radiation. The UV-blocking layer prevents UV-radiation applied to one side from exposing the opposite side. If desired, both photoresist layers may be exposed simultaneously by splitting one UV beam.

Abstract: A method for fabricating a metallic wire mesh touch sensor with reduced visibility. A metallic wire mesh is formed on a transparent substrate such that the surface of the metallic wires is roughened or textured, so as to cause high scattering of incident light, thereby minimizing specularly reflected light towards the user. The metal lines are formed over patterned catalytic photoresist. The rough or textured surface of the metallic wires is achieved by roughening or texturing the catalytic photoresist, by selecting parameters of electronless plating of copper, or both. An RMS surface roughness of about 50 nm would scatter approximately 70% of incident cyan light incident at 30°.

Abstract: Light reflection from a metal mesh touch sensor is reduced or prevented by encasing the metal lines with a passivation coating and including non-reflective nanoparticles in the patterning photoresist. The photoresist is mixed with catalytic nanoparticles wherein the nanoparticles are formed to minimize light reflection. The nanoparticles may be carbon coated metallic particles, or uncoated palladium nanoparticles. Also, a standoff photoresist layer may be included between the substrate and the photoresist composition to prevent reflection from the edges of the metallic lines.

Abstract: A method of forming alignment marks includes providing a III-V compound substrate having a device region and an alignment mark region, forming a hardmask layer having a first set of openings on the alignment mark region exposing a first surface portion of the III-V compound substrate and a second set of openings on the device region exposing a second surface portion of the III-V compound substrate, etching the exposed surface of the III-V compound substrate using the hardmask layer as a mask to form a plurality of trenches, and epitaxially regrowing a semiconductor layer in the trenches to form the alignment marks extending to a predetermined height over the processing surface of the III-V compound substrate.