Abstract: Some implementations of the disclosure are directed to an interconnect including: a plurality of ports; a processor; and a non-transitory computer readable medium have instructions stored thereon, that when executed by a processor, cause the interconnect device to: track a link state of a first port of the plurality of ports, where tracking the link state of the first port comprises tracking when a physical link of the first port transitions between a linked state and an unlinked state; determine, using at least the tracking of when the physical link of the first port transitions between the linked state and the unlinked state, that the first port is in an unstable link state; and when the first port is in an unstable link state, transmitting a message to an interconnect management device, the message including an indication that the first port is in an unstable link state.

Abstract: Some implementations of the disclosure are directed to an interconnect including: a plurality of ports; a processor; and a non-transitory computer readable medium have instructions stored thereon, that when executed by a processor, cause the interconnect device to: track a link state of a first port of the plurality of ports, where tracking the link state of the first port comprises tracking when a physical link of the first port transitions between a linked state and an unlinked state; determine, using at least the tracking of when the physical link of the first port transitions between the linked state and the unlinked state, that the first port is in an unstable link state; and when the first port is in an unstable link state, transmitting a message to an interconnect management device, the message including an indication that the first port is in an unstable link state.