Abstract: Methods and systems for queuing transfers of multiple non-contiguous address ranges within a single command are disclosed. Embodiments of systems include system processors, memory to store data and executable software, and storage devices to receive transfer commands stored in system memory. A host controller interface driver is executed by one or more system processors and collects multiple non-continuous address ranges from storage-device transfer requests and records starting addresses and quantities of data to transfer for each non-continuous range in a tagged command list. It records the number of address ranges in the tagged command list, and a tagged-transfer opcode in a command, and stores the command and the tagged command list in a command table for the storage device. It records a base address for the command table in memory and an offset for the tagged command list into a command header, which is stored in a command queue.

Abstract: A non-volatile memory, such as a NAND memory, may be encrypted by reading source blocks, writing to destination blocks, and then erasing the source blocks. As part of the encryption sequence, a power fail recovery procedure, using sequence numbers, is used to reestablish a logical-to-physical translation table for the destination blocks.

Abstract: Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.

Abstract: A method is provided. The method includes receiving data and classifying received data in one of several tiers of data. The method also includes storing each tier of data on a different non-volatile memory device.

Abstract: Incrementing sequence numbers in the metadata of non-volatile memory is used in the event of a resume from power fail to determine which data in the memory is current and valid, and which data is not. To reduce the amount of metadata space consumed by these sequence numbers, the numbers are permitted to be small enough to wrap around when the maximum value is reached. Two different techniques are disclosed to keep this wrap around condition from causing ambiguity in the relative values of the sequence numbers.

Abstract: Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.

Abstract: Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.

Abstract: A method is provided. The method includes receiving data and classifying received data in one of several tiers of data. The method also includes storing each tier of data on a different non-volatile memory device.

Abstract: Methods and systems for queuing transfers of multiple non-contiguous address ranges within a single command are disclosed. Embodiments of systems include system processors, memory to store data and executable software, and storage devices to receive transfer commands stored in system memory. A host controller interface driver is executed by one or more system processors and collects multiple non-continuous address ranges from storage-device transfer requests and records starting addresses and quantities of data to transfer for each non-continuous range in a tagged command list. It records the number of address ranges in the tagged command list, and a tagged-transfer opcode in a command, and stores the command and the tagged command list in a command table for the storage device. It records a base address for the command table in memory and an offset for the tagged command list into a command header, which is stored in a command queue.

Abstract: A non-volatile memory, such as a NAND memory, may be encrypted by reading source blocks, writing to destination blocks, and then erasing the source blocks. As part of the encryption sequence, a power fail recovery procedure, using sequence numbers, is used to reestablish a logical-to-physical translation table for the destination blocks.

Abstract: Techniques to manage various errors in memory such as, e.g., NAND memory in electronic devices are disclosed. In some embodiments, erase, read, and program error handling errors are managed.

Abstract: Incrementing sequence numbers in the metadata of non-volatile memory is used in the event of a resume from power fail to determine which data in the memory is current and valid, and which data is not. To reduce the amount of metadata space consumed by these sequence numbers, the numbers are permitted to be small enough to wrap around when the maximum value is reached. Two different techniques are disclosed to keep this wrap around condition from causing ambiguity in the relative values of the sequence numbers.

Abstract: Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.

Abstract: An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver. In an embodiment, a non-volatile cache may be implemented by creating a device option read only memory (ROM), or modifying the associated computer basic input-output system (BIOS) to trap software interrupts associated with disk and other media access requests. Associated addresses, such as logical block addresses, can be stored in a log for data that is modified. The resulting log can be stored in a non-volatile medium, including the cache itself. If the available log space is not large enough to record all write activity prior to loading operating system drivers, a flag may be set to indicate the overrun condition.

Abstract: A method and apparatus for preserving the processing order of some requests in a system is disclosed. The method may include blocking requests from executing based on a blocked count data field, blocking list data field, and a last request data field. The apparatus may include a system or a memory device.

Abstract: A method includes receiving a request to access a disk drive. The request has a size. The method further includes selecting a queue, based at least in part on the size of the request, from among a plurality of queues, and assigning the request to the selected queue.

Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.

Abstract: Methods and arrangements to interface a data storage device such as a small form factor IDE/ATA hard drive are disclosed. Embodiments may comprise a host and/or a data storage device. The host and data storage device may form, e.g., a handheld device such as an MP3 player, a cellular phone, or the like. The host may comprise a new interface referred to as a CE-ATA interface that facilitates interaction with the data storage device. In many embodiments, the CE-ATA interface combines an ATA command layer or emulator with a Multimedia Card (MMC) electrical interface, advantageously accommodating a fast time-to-market solution by leveraging existing technologies. More specifically, ATA commands may be mapped into an MMC register space to transmit the commands to the data storage device. Several embodiments also implement interrupt functions for the data storage device. Other embodiments may be disclosed and claimed.

Abstract: Curcumin analogues and methods are provided for treatment of disease.

Abstract: Embodiments of abstracted dynamic addressing are generally described herein. Other embodiments may be described and claimed.