Patents by Inventor Robert S. K. Chau

Robert S. K. Chau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5891809
    Abstract: A method of forming a thin, robust nitrided oxide layer. The process results in a manufacturable, uniform, low-defect density, reliable nitrided oxide that may be used as a gate dielectric, as a portion of a spacer, or as a portion of a trench isolation. First, a substrate is oxidized in a chlorinated dry oxidation followed by a low temperature pyrogenic steam oxidation. Next, a low temperature ammonia anneal is performed, followed by a high temperature anneal in an inert ambient.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: April 6, 1999
    Assignee: Intel Corporation
    Inventors: Robert S. K. Chau, Lawrence N. Brigham, Chia-Hong Jan, Chan-Hong Chern, Binny P. Arcot
  • Patent number: 5244843
    Abstract: A novel process for forming a robust, sub-100 .ANG. oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen during temperature ramp and stabilization. First, a dry oxidation is performed in oxygen and 13% trichloroethane. Next, a wet oxidation in pyrogenic steam is performed to produce a total oxide thickness of approximately 80 .ANG.. The oxide layer formed is ideally suited for use as a high integrity gate oxide below 100 .ANG.. The invention is particularly useful in devices with advanced, recessed field isolation where sharp silicon edges are difficult to oxidize. For an oxide layer of more than 100 .ANG., a composite oxide stack is used which comprises 40-90 .ANG. of pad oxide formed using the above novel process, and 60-200 .ANG. of deposited oxide.
    Type: Grant
    Filed: December 17, 1991
    Date of Patent: September 14, 1993
    Assignee: Intel Corporation
    Inventors: Robert S. K. Chau, William L. Hargrove, Leopoldo D. Yau
  • Patent number: RE38674
    Abstract: A novel process for forming a robust, sub-100 Å oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen during temperature ramp and stabilization. First, a dry oxidation is performed in oxygen and 13% trichloroethane. Next, a wet oxidation in pyrogenic steam is performed to produce a total oxide thickness of approximately 80 Å. The oxide layer formed is ideally suited for use as a high integrity gate oxide below 100 Å. The invention is particularly useful in devices with advanced, recessed field isolation where sharp silicon edges are difficult to oxidize. For an oxide layer of more than 100 Å, a composite oxide stack is used which comprises 40-90 Å of pad oxide formed using the above novel process, and 60-200 Å of deposited oxide.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: December 21, 2004
    Assignee: Intel Corporation
    Inventors: Robert S. K. Chau, William L. Hargrove, Leopoldo D. Yau