Abstract: The accessory attaches first and second wireless earbuds to each other. The accessory includes an elongated flexible member in the form of a chain, chord, braid or the like which extends between the earbuds. The elongated member has, at each end thereof, a part connected to the end of the member which is adapted to engage a different one of the earbuds. The engaging part may take the form of a rubber sleeve which frictionally engages the earbud stem for use with a conventional earbud or a threaded section which engages the threaded section of a modified earbud. In one embodiment, the modified earbud has a protruding loop member and the engaging part takes the form of a clasp. Ornamental elements of various types can be attached to the member.

Abstract: In one exemplary embodiment of the invention, a method includes: receiving a first description for a circuit whose operation over a plurality of inputs is to be verified; receiving a second description for expected behavior of the circuit, where the expected behavior in the second description is expressed as a set of algebraic systems of multivariable polynomials over at least one Galois field; applying at least one computational algebraic geometry technique to a combination of the first description and the second description to determine whether the circuit is verified, where verification of the circuit confirms that at least one output obtained based on the first description corresponds to at least one expected value based on the expected behavior expressed in the second description; and outputting an indication as to whether the circuit is verified.

Abstract: In one exemplary embodiment of the invention, a method includes: receiving a first description for a circuit whose operation over a plurality of inputs is to be verified; receiving a second description for expected behavior of the circuit, where the expected behavior in the second description is expressed as a set of algebraic systems of multivariable polynomials over at least one Galois field; applying at least one computational algebraic geometry technique to a combination of the first description and the second description to determine whether the circuit is verified, where verification of the circuit confirms that at least one output obtained based on the first description corresponds to at least one expected value based on the expected behavior expressed in the second description; and outputting an indication as to whether the circuit is verified.

Abstract: In a method of data processing, a database defines a Dial entity and at least one instance of the Dial entity. Each instance of the Dial entity has an input having a plurality of different possible input values and one or more outputs, and each of the plurality of different possible input values has a different associated output value set for the one or more outputs. Each instance of the Dial entity determines a value of at least one of a plurality of configuration latches in a digital system separate from the database. The database also associates with the Dial entity at least one set of biasing weights that, when applied, determines a probability of each instance of the Dial entity having particular ones of the plurality of different possible input values.

Abstract: A digital system includes one or more design entities containing a functional portion of the digital system. Within a configuration database, one or more configuration entities are instantiated. The configuration entities including an Error checking Dial (EDial) having a plurality of input latches within the digital design and a plurality of output latches within the digital design. The EDial has an associated function defining a relationship between values of the input latches and values of the output latches. An instance of the EDial in the configuration database is accessed to access the values of the output latches in the digital design.

Abstract: In a method of data processing, a binary system configuration file is interpreted by reference to a value set of at least one system-level variable in response to a configuration event. The binary system configuration file contains a binary representation of a plurality of system configuration statements specifying a plurality of different alternative configurations of a data processing system in terms of the at least one system-level variable. In response to interpreting the binary system configuration file, the data processing system is configured for operation by setting one or more configuration latches within the data processing system.