Abstract: A novel IC chip packaging construction in which the chip package materials are selected such that their thermal linear expansion curves are closely matched over the full operating temperature range of the IC chip. The IC chip packaging construction includes a metal base and cover for enclosing the IC chip and a pair of insulating frames for hermetically sealing the IC chip in the chip package. A plurality of input/output leads make electrical connections with the IC chip through fine wires that are soldered to the leads and to contact areas on the IC chip. The metal base and cover and the input/output leads are fabricated from copper and the insulating frames are fabricated from Fotoceram.RTM. 160, which has a thermal linear expansion curve that closely matches that of copper over the full operating temperature range of the chip. Accordingly, the problems of differential expansion rates due to temperature variations for wafer size or very large scale IC chips are greatly minimized.

Abstract: The present invention resides in a packaging construction for removably mounting and interconnecting semiconductor wafers with minimized interconnection lead lengths between the wafers and with a high packing density. The wafer packaging construction includes a multilayer printed circuit board, an insulating board interposed between each wafer and the circuit board and upper and lower housing sections. Electrical connections between contact areas on each semiconductor wafer and the multilayer circuit board are established by compressing the housing sections together, thus compressing wadded-wire connector elements positioned in openings of the insulating boards against the wafer contact areas and the multilayer circuit board contact areas.

Abstract: A power distribution system for distributing power to an IC is formed by attaching a grid having at least one power bus and one ground bus to the top surface of the IC die. The grid is adapted to be electrically coupled with power and ground pins in the IC's package The grid has an insulative layer on its bottom surface to electrically isolate the grid's bottom surface from the IC. The grid is adapted to cover substantially the entire top surface of the IC and to be electrically coupled directly from the top surface of the grid to terminal or connection points on the top surface of the IC. The connection points can be distributed throughout the IC to reduce the area of metallization in the IC and the path length the current from the power busses must traverse.

Abstract: A backplane interconnection system for interconnecting an array of electronic components, such as integrated-circuit (IC) chip packages mounted on multilayer printed circuit boards. The backplane interconnection system includes an interface board and one or more interconnecting circuit board and a plurality of insulating boards arranged on a heat sink. The interconnecting circuit boards and the insulating boards are alternately interposed between the interface board and the array of electronic components such that an insulating board is positioned adjacent both the interface board and adjacent the array of electronic components. Connector elements disposed in selected openings of the insulating boards make electrical connections between contact areas on the interconnecting boards, the electronic components and the interface board.

Abstract: An improved electrical connector for making electrical connections between electronic components. The improved electrical connector includes an insulating board interposed between metalized contact areas on the electronic components. The insulating board has openings at positions corresponding to the contact areas of the electronic components, with electrical connections between the contact areas established with conductive connector elements positioned in the openings of the insulating board. The connector elements are preferably each formed from a strand of metal wire, each strand being wadded together to form a nearly cylindrical "button" of material having a density of between twenty and thirty percent. The improved electrical connector provides high density contact areas, easy engagement and disengagement of the electronic components, and minimum electrical resistance between the contact areas.

Abstract: An integrated-circuit (IC) chip packaging construction for mounting and interconnecting IC chips and IC chip packages with a multilayer printed circuit board, without soldering, special tooling or special labor, and for interconnecting IC chips with minimized interconnection lead lengths between the IC chips, without cable harnesses or back-panel wiring. The IC chips and IC chip packages are mounted and interconnected using an insulating board having openings through it, and a number of connector elements in the form of compressible wads of conductive wire. The connector elements are disposed in selected openings in the insulating board and compressed into contact with the contact areas on the IC chips and IC chip packages. In a three-dimensional construction employing the principles of the invention, the IC chips are arranged in modules, and interconnections may be made between IC chips within each module, transversely between modules, and in a third direction between layers of modules.

Abstract: High power dissipating micro electronic circuit chips are cooled in a high ensity package by mounting individual chips on sintered stainless steel pads and surrounding the micro chips with a liquid fluoro-chemical to achieve cooling. The chips are directly bonded to the sintered stainless steel pads and are not packaged in chip carriers. The stainless steel pads provide a solid mounting for the chips to allow for wire bonding of the chips directly to the printed circuit board and electrical interconnections accommodate the differential coefficient of expansion between the chips and the housing. The stainless steel pads acts as wicks drawing the coolant fluid to the bottom side of the chips while the top side of the chips, also in direct contact with the coolant, enable the fluid to boil and remove heat during liquid to vapor transformation, thereby limiting the surface temperature of the chips to the boiling point of the coolant.

Abstract: An improved test probe card for testing unpackaged integrated-circuit (IC) chips prior to installation of the chips in some type of electronic device. The test probe card includes a chip insulating board having openings at positions corresponding to contact areas of an IC chip and a test circuit board having inner contact areas at positions corresponding to the openings in the chip insulating board. Electrical connections between the IC chip and inner circuit board contact areas are established with conductive connector elements positioned in the openings. Circuit board traces electrically connect the inner circuit board contact areas with outer contact areas located about the periphery of the circuit board. The outer contact areas are preferably connected to a testing device using coaxial cables, which are electrically connected to the outer contact areas with a coaxial cable connecting board.

Abstract: A packaging construction for electronic circuit package elements, such as printed circuit boards and integrated-circuit chip packages, to obviate the need for connector cables, back-panel wiring and similar techniques. Circuit packaging elements are interconnected through an interconnection medium that includes an insulated board with opening through it, and a number of connector elements in the form of compressible wads of conductive wire. The connector elements are disposed in selected openings in the insulated board and compressed into contact with contact areas formed on the circuit package elements. Shorter lead lengths and improved circuit operating speed are the principal results of the approach. In a three-dimensional construction employing the principles of the invention, chip packages are arranged in modules, and interconnections may be made between chip packages within each module, tranversely between modules, and in a third direction between layers of modules.

Abstract: A packaging construction for electronic circuit package elements, such as printed circuit boards and integrated-circuit chip packages, to obviate the need for connector cables, back-panel wiring and similar techniques. Circuit packaging elements are interconnected through an interconnection medium that includes an insulated board with opening through it, and a number of connector elements in the form of compressible wads of conductive wire. The connector elements are disposed in selected openings in the insulated board and compressed into contact with contact areas formed on the circuit package elements. Shorter lead lengths and improved circuit operating speed are the principal results of the approach. In a three-dimensional construction employing the principles of the invention, chip packages are arranged in modules, and interconnections may be made between chip packages within each module, transversely between modules, and in a third direction between layers of modules.