Patents by Inventor Robert Soares

Robert Soares has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6894566
    Abstract: The invention relates to a very wide band amplifier circuit including a distributed amplification cell (100) connected to a biasing cell (200), the amplification cell (100) including several transistors (T1) connected in parallel between a drain line and a grid line, each terminated at one of its ends by a load (Zin, Zout), the biasing cell (200) including at least one transistor (T2) connected between a power source (VDD) and the drain line of the amplification cell (100), said biasing cell having an overall impedance equal to the impedance of the load (Zout) connected to the end of the drain line of the amplification cell (100), characterized in that the grid (G2) of the transistor (T2) of the biasing cell (200) is connected to the node (201) of a divider bridge (R1R2, R1T3) so as to set its grid (G2) potential (VG2), and in that the grid (G2) and the source (S2) of said transistor (T2) are connected together by means of at least one capacitor (C1, C2).
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: May 17, 2005
    Assignee: Da-Lightcom
    Inventors: Regis Claveau, Robert Soares, BenoƮt Boumard, Abdenour Chelouah
  • Publication number: 20040124924
    Abstract: The invention relates to a very wide band amplifier circuit including a distributed amplification cell (100) connected to a biasing cell (200), the amplification cell (100) including several transistors (T1) connected in parallel between a drain line and a grid line, each terminated at one of its ends by a load (Zin, Zout), the biasing cell (200) including at least one transistor (T2) connected between a power source (VDD) and the drain line of the amplification cell (100), said biasing cell having an overall impedance equal to the impedance of the load (Zout) connected to the end of the drain line of the amplification cell (100), characterized in that the grid (G2) of the transistor (T2) of the biasing cell (200) is connected to the node (201) of a divider bridge (R1R2, R1T3) so as to set its grid (G2) potential (VG2), and in that the grid (G2) and the source (S2) of said transistor (T2) are connected together by means of at least one capacitor (C1, C2).
    Type: Application
    Filed: July 22, 2003
    Publication date: July 1, 2004
    Inventors: Regis Claveau, Robert Soares, Benoit Boumard, Abdenour Chelouah
  • Patent number: 5162754
    Abstract: An amplification device relating to the field of the amplification of ultra-wideband electrical signals from the dc to the microwave range, and more precisely from dc to microwaves of over 6 GHz, notably for the amplification of signals transmitted at very high bit rates on optic fibers, of the type including at least one ampification stage, the active amplification element of which is a field-effect transistor mounted as a common source, each of the amplification stages including means for the simultaneous maintaining of a positive dc voltage bias on the drain of the amplification transistor and a negative or zero dc bias on the gate of the transistor. This device may advantageously be made in monolithic integrated circuit form.
    Type: Grant
    Filed: April 29, 1991
    Date of Patent: November 10, 1992
    Assignee: France Telecom (CNET)
    Inventors: Robert Soares, Serge Mottet, Georges Follot, Andre Perennec