Patents by Inventor Robert Supnik

Robert Supnik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160267050
    Abstract: A method for writing data is provided. The method comprises receiving, via a storage subsystem controller, over a fabric, a write command from a host device. The method further comprises identifying, via the storage subsystem controller, over the fabric, based at least in part on the write command, a flash main memory of a node device on which to store write data associated with the write command. The method also comprises facilitating, via the storage subsystem controller, an establishment of a remote direct memory access connection between the host device and the flash main memory of the node device over the fabric such that the write data is communicable from the host device to the flash main memory of the node device over the fabric.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 15, 2016
    Applicant: UNISYS CORPORATION
    Inventor: Robert Supnik
  • Publication number: 20160266813
    Abstract: A method for reading data is provided. The method comprises receiving, via a storage subsystem controller, over a fabric, a read command from a host device. The method further comprises locating, via the storage subsystem controller, over the fabric, based at least in part on the read command, read data in a flash main memory of a node device. The method also comprises facilitating, via the storage subsystem controller, an establishment of a remote direct memory access connection between the flash main memory of the node device and the host device over the fabric such that the read data is communicable from the flash main memory of the node device to the host device over the fabric.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 15, 2016
    Applicant: UNISYS CORPORATION
    Inventor: Robert Supnik
  • Publication number: 20050257256
    Abstract: Methods and systems for load balancing a plurality of entities, such as firewalls, in a network environment are disclosed. In particular, the load balancing of firewalls on a bidirectional traffic path is performed using a single device that controls both incoming and outgoing traffic through the firewalls. The single device may include virtual routers for controlling the bidirectional traffic through the firewalls. A first virtual router may control incoming traffic to the firewalls and the other virtual router may control outgoing traffic to the firewalls. The virtual routers are logical partitions of the device layered on the physical resources of the device. The virtual routers share all or portions of the physical resources of the single device.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 17, 2005
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Robert Supnik, David Caplan, Paul Phillips, Michael Banatt
  • Patent number: 5043867
    Abstract: A data process system capable of executing vector instructions and scalar instructions detects the occurrence of arithmetic exception conditions and allows subsequent scalar instruction processing until execution of the next vector instruction is required.
    Type: Grant
    Filed: March 18, 1988
    Date of Patent: August 27, 1991
    Assignee: Digital Equipment Corporation
    Inventors: Dileep P. Bhandarkar, Robert Supnik, Steven Hobbs
  • Patent number: 4949250
    Abstract: A data processing system containing a vector processor and a scalar processor executes scalar and vector instructions which both comprise an operation portion and an operand pointer portion. In the vector instructions, however, the operand pointer portion contains an operand specifier which identifies a vector control word. Each vector control word contains, for the corresponding vector instruction, flags and vector operand pointers. The vector operand pointers specify vector registers in the vector processor. The flags contain additional information for the execution of the vector instructions.
    Type: Grant
    Filed: March 18, 1988
    Date of Patent: August 14, 1990
    Assignee: Digital Equipment Corporation
    Inventors: Dileep P. Bhandarkar, Robert Supnik, Tryggve Fossum, Dwight Manley