Abstract: A matrix-addressed AC TFEL panel includes odd- and even-numbered scanning electrodes driven from opposite sides of the panel by separate power supplies. The data electrodes are divided into top and bottom sets so that they are arranged as complementary pairs extending towards each other slightly less than halfway across the screen leaving a small gap in the middle. The odd- and even-numbered scanning electrodes are divided into top and bottom subsets so that the top and bottom halves of the panel may be scanned simultaneously in line-by-line fashion. When an even electrode in the top half of the panel is scanned with a voltage of a first polarity, an odd electrode in the bottom half may be scanned with a voltage of an opposite polarity. Thus, the load for the scanning of the top and bottom halves is divided between positive and negative power supplies. To provide symmetric drive the polarities may be reversed each frame.

Abstract: A wafer probe comprises a support member having an end region which is shaped to permit the end region to be brought into close proximity with a component under test. An amplifier is mounted on the support member at its end region. A conductive probe element is attached to the amplifier and is electrically connected to the amplifier's input terminal. A transmission line is connected to the amplifier's output terminal for transmitting signals from the amplifier to a measurement instrument.

Abstract: An electrode structure for an AC matrix-addressed TFEL panel includes top and bottom sets of scanning electrodes, each located in a respective half of the panel, and top and bottom sets of data electrodes extending at right angles to the scanning electrodes where each electrode in the top and bottom set extends for a distance slightly less than halfway across the panel to provide a split screen display. The scanning electrodes are driven by driver amplifiers that simultaneously energize complimentary pairs of the scanning electrodes in the top and bottom halves of the panel driving them in line-by-line fashion. The top and bottom sets of data electrodes are driven simultaneously by top and bottom sets of electrode drivers simultaneously with each scan of the data electrodes. In this way the top and bottom halves of the panel are scanned simultaneously, and the writing of one frame of data is faster. Also, the column electrodes are shorter and therefore require less energy and consume less power per frame.

Abstract: A driving architecture for a matrix addressed TFEL display includes upper and lower data electrode arrays divided by a narrow gap and scanning electrodes arranged in complementary pairs one for each array of data electrodes. The data electrodes are charged at a rate which minimizes the power loss in the resistive component of the data electrode circuitry. The top and bottom data electrode arrays may be driven simultaneously, thereby decreasing the time needed to scan the panel, thus permitting more electrodes and larger screens. The split-screen array provides shorter data electrodes which take less time to charge, thus permitting use of energy-saving techniques which require a slower charging rate.

Abstract: A drive network for a TFEL panel includes a series resonant drive circuit for producing pulses of a predetermined frequency, a transformer for coupling the drive circuit to a TFEL panel, and symmetrically driven push-pull row drivers, a plurality of which may be implemented on a single integrated circuit chip. The transformer includes switching means for alternately providing positive and negative high-voltage pulses for the row drivers on alternate frames of data. The network formed by the series resonant drive circuit and the TFEL panel is a series RLC circuit which is driven at its resonant frequency.

Abstract: A TFEL panel includes orthogonally disposed sets of scanning and data electrodes. The scanning electrodes are strobed with a preconditioning voltage and data is provided to selected data electrodes simultaneously with the line by line strobing of the scanning electrodes. A refresh pulse is applied to the screen once per frame of data at times which vary from frame to frame. This may be accomplished either by varying the time of occurrence of the refresh pulse within each frame or by holding the time of occurrence of the refresh pulse constant and varying the strobing sequence of the scanning electrodes. This technique prevents certain portions of the screen from generating a latent image due to charge accumulation which would otherwise result from the timing asymmetry between the scanning of certain electrodes and the fixed timing of the refresh pulse.

Abstract: A phase lock circuit including a phase/frequency detector, a plurality of selectable filters, and a plurality of variable frequency signal generators connected in a loop to lock an output signal to an input signal. An out-of-frequency-range condition detector is provided to facilitate automatic selection of an appropriate in-range combination of filter and signal generator to cause lock to occur.