Patents by Inventor Robert Tepp

Robert Tepp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11368952
    Abstract: A gateway includes memory configured to store computer-readable program code; and processing circuitry configured to access the memory and execute the computer-readable program code. The gateway is connected or connectable to a low-power wide area (LPWA) network. The gateway is caused to transmit a common timing reference at a constant interval that delineates an epoch including timeslots assignable to network nodes and a free-for-all interval. The gateway is also caused to join a network node to the LPWA network based on the common timing reference and is further caused to receive a join message including a measure of received signal strength or quality of the common timing reference at the network node. The gateway is also caused to assign one or more timeslots within the epoch, a frequency, a channel, or a modulation to the network node based on the measure of received signal strength or other quality.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: June 21, 2022
    Assignee: SmartConnect Solutions, LLC.
    Inventors: David Freed, Christopher Posey, Robert Tepp, Ilya Kovnatsky, Daniel Richard Wisniewski
  • Publication number: 20200178250
    Abstract: A gateway includes memory configured to store computer-readable program code; and processing circuitry configured to access the memory and execute the computer-readable program code. The gateway is connected or connectable to a low-power wide area (LPWA) network. The gateway is caused to transmit a common timing reference at a constant interval that delineates an epoch including timeslots assignable to network nodes and a free-for-all interval. The gateway is also caused to join a network node to the LPWA network based on the common timing reference and is further caused to receive a join message including a measure of received signal strength or quality of the common timing reference at the network node. The gateway is also caused to assign one or more timeslots within the epoch, a frequency, a channel, or a modulation to the network node based on the measure of received signal strength or other quality.
    Type: Application
    Filed: December 3, 2019
    Publication date: June 4, 2020
    Inventors: David Freed, Christopher Posey, Robert Tepp, Ilya Kovnatsky, Daniel Richard Wisniewski