Patents by Inventor Robert Theed
Robert Theed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230334769Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: ApplicationFiled: June 19, 2023Publication date: October 19, 2023Inventors: Richard Broadhurst, John Howson, Robert Theed
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Patent number: 11682163Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: GrantFiled: June 30, 2021Date of Patent: June 20, 2023Assignee: Imagination Technologies LimitedInventors: Richard Broadhurst, John Howson, Robert Theed
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Publication number: 20210327124Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: ApplicationFiled: June 30, 2021Publication date: October 21, 2021Inventors: Richard Broadhurst, John Howson, Robert Theed
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Patent number: 11080926Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: GrantFiled: November 13, 2019Date of Patent: August 3, 2021Assignee: Imagination Technologies LimitedInventors: Richard Broadhurst, John Howson, Robert Theed
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Publication number: 20200082606Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: ApplicationFiled: November 13, 2019Publication date: March 12, 2020Inventors: Richard Broadhurst, John Howson, Robert Theed
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Patent number: 10510182Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitive fragments, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will be subsequently hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: GrantFiled: October 6, 2015Date of Patent: December 17, 2019Assignee: Imagination Technologies LimitedInventors: Richard Broadhurst, John Howson, Robert Theed
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Patent number: 10242482Abstract: In tile-based graphics processing systems, a tiling unit determines which tiles of a rendering space a primitive is in, such that the primitives in a tile can be rendered. A bounding box is determined for the primitive. For each tile boundary between lines of tiles in the bounding box, intersection points of the tile boundary with edges of the primitive are determined and used to determine which of the tiles in the bounding box the primitive is in. In this way the tiling process can be implemented without performing tiling calculations for all of the tiles in the bounding box for a primitive. Reducing the number of tiling calculations can help to improve the efficiency of the graphics processing system (in terms of speed and power consumption) for rendering a primitive.Type: GrantFiled: April 22, 2016Date of Patent: March 26, 2019Assignee: Imagination Technologies LimitedInventors: Xile Yang, Robert Theed
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Patent number: 10109029Abstract: A tiling unit is arranged to process a sequence of primitive blocks using multiple parallel tiling engine pipes. Each tiling engine pipe processes a respective primitive block, and determines priorities for regions of the respective primitive block based on whether the primitive block overlaps with any of the other primitive blocks currently being processed in the parallel tiling engine pipes. Each tiling engine pipe processes the regions of its primitive block in a tile-order based on the priorities of the regions. The submission order of the primitives should be maintained when primitive identifiers are written into display lists. Therefore, the priority of a region of a first primitive block is increased (or decreased) if it overlaps with another primitive block which has a higher (or lower) sequence number and which is currently being processed in another tiling engine pipe. This reduces the time that the tiling engine pipes are idle.Type: GrantFiled: November 10, 2016Date of Patent: October 23, 2018Assignee: Imagination Technologies LimitedInventors: Xile Yang, Robert Theed
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Publication number: 20170061571Abstract: A tiling unit is arranged to process a sequence of primitive blocks using multiple parallel tiling engine pipes. Each tiling engine pipe processes a respective primitive block, and determines priorities for regions of the respective primitive block based on whether the primitive block overlaps with any of the other primitive blocks currently being processed in the parallel tiling engine pipes. Each tiling engine pipe processes the regions of its primitive block in a tile-order based on the priorities of the regions. The submission order of the primitives should be maintained when primitive identifiers are written into display lists. Therefore, the priority of a region of a first primitive block is increased (or decreased) if it overlaps with another primitive block which has a higher (or lower) sequence number and which is currently being processed in another tiling engine pipe. This reduces the time that the tiling engine pipes are idle.Type: ApplicationFiled: November 10, 2016Publication date: March 2, 2017Inventors: Xile Yang, Robert Theed
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Patent number: 9524534Abstract: A tiling unit is arranged to process a sequence of primitive blocks using multiple parallel tiling engine pipes. Each tiling engine pipe processes a respective primitive block, and determines priorities for regions of the respective primitive block based on whether the primitive block overlaps with any of the other primitive blocks currently being processed in the parallel tiling engine pipes. Each tiling engine pipe processes the regions of its primitive block in a tile-order based on the priorities of the regions. The submission order of the primitives should be maintained when primitive identifiers are written into display lists. Therefore, the priority of a region of a first primitive block is increased (or decreased) if it overlaps with another primitive block which has a higher (or lower) sequence number and which is currently being processed in another tiling engine pipe. This reduces the time that the tiling engine pipes are idle.Type: GrantFiled: February 9, 2015Date of Patent: December 20, 2016Assignee: Imagination Technologies LimitedInventors: Xile Yang, Robert Theed
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Publication number: 20160314618Abstract: In tile-based graphics processing systems, a tiling unit determines which tiles of a rendering space a primitive is in, such that the primitives in a tile can be rendered. A bounding box is determined for the primitive. For each tile boundary between lines of tiles in the bounding box, intersection points of the tile boundary with edges of the primitive are determined and used to determine which of the tiles in the bounding box the primitive is in. In this way the tiling process can be implemented without performing tiling calculations for all of the tiles in the bounding box for a primitive. Reducing the number of tiling calculations can help to improve the efficiency of the graphics processing system (in terms of speed and power consumption) for rendering a primitive.Type: ApplicationFiled: April 22, 2016Publication date: October 27, 2016Inventors: Xile Yang, Robert Theed
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Publication number: 20160098856Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitive fragments, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will be subsequently hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.Type: ApplicationFiled: October 6, 2015Publication date: April 7, 2016Inventors: Richard Broadhurst, John Howson, Robert Theed
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Publication number: 20150228049Abstract: A tiling unit is arranged to process a sequence of primitive blocks using multiple parallel tiling engine pipes. Each tiling engine pipe processes a respective primitive block, and determines priorities for regions of the respective primitive block based on whether the primitive block overlaps with any of the other primitive blocks currently being processed in the parallel tiling engine pipes. Each tiling engine pipe processes the regions of its primitive block in a tile-order based on the priorities of the regions. The submission order of the primitives should be maintained when primitive identifiers are written into display lists. Therefore, the priority of a region of a first primitive block is increased (or decreased) if it overlaps with another primitive block which has a higher (or lower) sequence number and which is currently being processed in another tiling engine pipe. This reduces the time that the tiling engine pipes are idle.Type: ApplicationFiled: February 9, 2015Publication date: August 13, 2015Inventors: Xile Yang, Robert Theed