Abstract: An improved method for fabricating a tunnel oxide window for use in an EEPROM memory cell is provided so as to produce better programming endurance. A P+ implant is provided at the tunnel window edge. During the programming operation, the P+ contacted inversion layer is used instead of the program junction. As a result, there is eliminated the voltage drop in the program junction region so as to improve the efficiency of programming.

Abstract: A non-volatile memory cell is disclosed with increased drive current. A low voltage read transistor is used to increase the drive current. However, with a low voltage read transistor, extra protection is needed to ensure the read transistor is not damaged by high voltage. In one aspect, an isolation transistor is inserted between the read transistor and a sense transistor. The isolation transistor, read transistor and sense transistor are connected in series. When a high voltage is used during an erase operation of the memory cell, the isolation transistor absorbs some of the voltage to protect the read transistor from an excessive voltage level.

Abstract: An improved method for fabricating a tunnel oxide window for use in an EEPROM memory cell is provided so as to produce better programming endurance. A P+ implant is provided at the tunnel window edge. During the programming operation, the P+ contacted inversion layer is used instead of the program junction. As a result, there is eliminated the voltage drop in the program junction region so as to improve the efficiency of programming.