Patents by Inventor Robert V. Hutchison

Robert V. Hutchison has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4132856
    Abstract: A process of packaging an electronic integrated circuit which comprises a film carrier having metallized connector leads formed thereon to provide the connector leads for the integrated circuit (a hermetically sealed bumped die); gang-bonding the die to said leads; preferably testing the die and bounding thereof for electrical performance, continuity, etc.; placing a metal heat sink having a raised die attach area and a pair of pedestals coextensive with said film carrier into a transfer mold with the leads remaining planar; epoxy bonding said die to said die attach area concurrently soldering selected leads to said pedestals; and completely encapsulating said die in plastic while in said mold allowing said plastic to flow freely on both sides of the die attach area and over most of said heat sink to prevent warpage of the package when said plastic and metal cools but leaving the outer edges of said leads, not connected to said pedestals, open and free of plastic.
    Type: Grant
    Filed: November 28, 1977
    Date of Patent: January 2, 1979
    Assignee: Burroughs Corporation
    Inventors: Robert V. Hutchison, John A. Nelson
  • Patent number: 4115836
    Abstract: A cooling system for integrated circuit packaging of the conventional dual-in-line (DIP) type including a carrier heat sink plate which form web sections which engage the bodies of the DIP held side-by-side thereon. The plate is thermally and mechanically connected by means of a clamping device to a cooling frame in which a serpentine tubing carries coolant throughout spaced apart sections thereof, so that the heat generated by the DIP's is carried away by the heat sink plate into the frame sections where the coolant circulate. The DIP pins are electrically connected to a printed circuit board and to relatively flat flexible ribbon type printed circuit type cable the latter being clamped at each end into a standard connector which itself is clamped to an island printed circuit board having conductors thereon for connecting the DIP's to other electronic devices. Multiplicity of these DIP's so mounted in the cooling frame may be housed in the same console or housing along with other DIP islands as desired.
    Type: Grant
    Filed: April 25, 1977
    Date of Patent: September 19, 1978
    Assignee: Burroughs Corporation
    Inventors: Robert V. Hutchison, Peter P. Gregg, James J. MacBride
  • Patent number: 4104700
    Abstract: A system for cooling high density integrated circuits for computer systems comprising a cooling frame having a plurality of the heat pipes spanning the space within the frame to which sub-islands are attached to form an island. Each sub-island comprises a printed circuit board on which are mounted connectors for mounting the integrated circuit package and printed circuit board heat sinks having posts which cooperate with hold down pressure clamps for clamping the integrated circuit packages into the connectors and to clamp the heat sink plates of the integrated circuit packages to the printed circuit board heat sinks. These posts also aid in clamping the sub-islands together by cooperating a heat pipe hold down clamp by which each sub-island is clamped to the frame and to the heat pipes both mechanically and thermally to maximize the heat transfer between the integrated circuit packages and the heat pipes.
    Type: Grant
    Filed: January 31, 1977
    Date of Patent: August 1, 1978
    Assignee: Burroughs Corporation
    Inventors: Robert V. Hutchison, Peter P. Gregg, James J. MacBride
  • Patent number: 4070084
    Abstract: A controlled impedance connector for providing a high density controlled impedance interface between a computer backplane and printed circuit (PC) logic card circuitry having signal carrying conductors and a ground surface imbedded in a dielectric medium at selected spacings to achieve a desired characteristic impedance. A common ground surface is provided for a plurality of signal conductors which are in a selected geometrical relationship with the ground surface. Another embodiment of the invention uses a plurality of microstrips embedded in a dielectric medium and dielectrically separated from a common ground surface to achieve the desired characteristic impedance.
    Type: Grant
    Filed: May 20, 1976
    Date of Patent: January 24, 1978
    Assignee: Burroughs Corporation
    Inventor: Robert V. Hutchison
  • Patent number: 4046442
    Abstract: A semiconductor device package which can be readily mounted on a printed circuit board without requiring soldering or intermediate connectors. A supporting substrate has a unique lead frame configuration thereon in which the leads extend around side portions of the substrate and form integral spring contacts projecting from the lower surface of the substrate. The package preferably includes a metallic stud having a head portion mounted in the substrate for receiving a semiconductor device and a rod portion extending from the lower surface of the substrate. The rod portion of the stud can be removably secured in an aperture in a printed circuit board to engage the spring contacts with corresponding conductors on the circuit board.
    Type: Grant
    Filed: May 3, 1976
    Date of Patent: September 6, 1977
    Assignee: Burroughs Corporation
    Inventor: Robert V. Hutchison
  • Patent number: 3999827
    Abstract: A unique contact pin configuration for an electrical connector provides an advantageous connection with a leadless semiconductor device package and a printed circuit board on which the connector is to be mounted. Each contact pin includes an elongated shaft portion, a resilient contact portion and a crossbar portion which offsets the contact portion from the shaft portion of the contact pin. Each contact pin is alternately situated 180.degree. in cavities disposed on two opposed sides of the connector. Consequently, the contact portions of the contact pins provide internal electrical connection to a leadless semiconductor device package with a small contact pad spacing, while providing an external electrical connection via the contact pin shaft portions with a larger spacing therebetween. Also described herein are distinctive stand-off bumps which are coaxial with the shaft portions of the contact pins to insure level mounting onto a printed circuit board.
    Type: Grant
    Filed: October 10, 1975
    Date of Patent: December 28, 1976
    Assignee: Burroughs Corporation
    Inventors: Robert V. Hutchison, John A. Nelson, Gerald R. Dunn
  • Patent number: 3984166
    Abstract: A semiconductor device package which can be readily mounted on a printed circuit board without requiring soldering or intermediate connectors. A supporting substrate has a unique lead frame configuration thereon in which the leads extend around side portions of the substrate and form integral spring contacts projecting from the lower surface of the substrate. The package preferably includes a metallic stud having a head portion mounted in the substrate for receiving a semiconductor device and a rod portion extending from the lower surface of the substrate. The rod portion of the stud can be removably secured in an aperture in a printed circuit board to engage the spring contacts with corresponding conductors on the circuit board.
    Type: Grant
    Filed: May 7, 1975
    Date of Patent: October 5, 1976
    Assignee: Burroughs Corporation
    Inventor: Robert V. Hutchison